1  /* { dg-do compile } */
       2  /* { dg-options "-O2 -ftree-vectorize" } */
       3  
       4  #include <stdint.h>
       5  
       6  #define VEC_PERM(TYPE)						\
       7  void __attribute__ ((noinline, noclone))			\
       8  vec_slp_##TYPE (TYPE *restrict a, TYPE *restrict b, int n)	\
       9  {								\
      10    for (int i = 0; i < n; ++i)					\
      11      {								\
      12        a[i * 2] += 1;						\
      13        a[i * 2 + 1] += 2;					\
      14        b[i * 4] += 3;						\
      15        b[i * 4 + 1] += 4;					\
      16        b[i * 4 + 2] += 5;					\
      17        b[i * 4 + 3] += 6;					\
      18      }								\
      19  }
      20  
      21  #define TEST_ALL(T)				\
      22    T (int8_t)					\
      23    T (uint8_t)					\
      24    T (int16_t)					\
      25    T (uint16_t)					\
      26    T (int32_t)					\
      27    T (uint32_t)					\
      28    T (int64_t)					\
      29    T (uint64_t)					\
      30    T (float)					\
      31    T (double)
      32  
      33  TEST_ALL (VEC_PERM)
      34  
      35  /* The loop should be fully-masked.  The load XFAILs for fixed-length
      36     SVE account for extra loads from the constant pool.  */
      37  /* { dg-final { scan-assembler-times {\tld1b\t} 6 { xfail { aarch64_sve && { ! vect_variable_length } } } } } */
      38  /* { dg-final { scan-assembler-times {\tst1b\t} 6 } } */
      39  /* { dg-final { scan-assembler-times {\tld1h\t} 6 { xfail { aarch64_sve && { ! vect_variable_length } } } } } */
      40  /* { dg-final { scan-assembler-times {\tst1h\t} 6 } } */
      41  /* { dg-final { scan-assembler-times {\tld1w\t} 9 { xfail { aarch64_sve && { ! vect_variable_length } } } } } */
      42  /* { dg-final { scan-assembler-times {\tst1w\t} 9 } } */
      43  /* { dg-final { scan-assembler-times {\tld1d\t} 9 { xfail { aarch64_sve && { ! vect_variable_length } } } } } */
      44  /* { dg-final { scan-assembler-times {\tst1d\t} 9 } } */
      45  /* { dg-final { scan-assembler-not {\tldr} } } */
      46  /* { dg-final { scan-assembler-not {\tstr} } } */
      47  
      48  /* We should use WHILEs for the accesses to "a" and ZIPs for the accesses
      49     to "b".  */
      50  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 } } */
      51  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 4 } } */
      52  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s} 6 } } */
      53  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d} 6 } } */
      54  /* { dg-final { scan-assembler-times {\tzip1\tp[0-7]\.b} 2 } } */
      55  /* { dg-final { scan-assembler-times {\tzip1\tp[0-7]\.h} 2 } } */
      56  /* { dg-final { scan-assembler-times {\tzip1\tp[0-7]\.s} 3 } } */
      57  /* { dg-final { scan-assembler-times {\tzip1\tp[0-7]\.d} 3 } } */
      58  /* { dg-final { scan-assembler-times {\tzip2\tp[0-7]\.b} 2 } } */
      59  /* { dg-final { scan-assembler-times {\tzip2\tp[0-7]\.h} 2 } } */
      60  /* { dg-final { scan-assembler-times {\tzip2\tp[0-7]\.s} 3 } } */
      61  /* { dg-final { scan-assembler-times {\tzip2\tp[0-7]\.d} 3 } } */
      62  
      63  /* { dg-final { scan-assembler-not {\tuqdec} } } */