1  /* { dg-do compile } */
       2  /* The cost model thinks that the double loop isn't a win for SVE-128.  */
       3  /* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=scalable -fno-vect-cost-model" } */
       4  
       5  #include <stdint.h>
       6  
       7  #define VEC_PERM(TYPE)						\
       8  TYPE __attribute__ ((noinline, noclone))			\
       9  vec_slp_##TYPE (TYPE *restrict a, int n)			\
      10  {								\
      11    TYPE res = 0;							\
      12    for (int i = 0; i < n; ++i)					\
      13      {								\
      14        res += a[i * 2] * 3;					\
      15        res += a[i * 2 + 1] * 5;					\
      16      }								\
      17    return res;							\
      18  }
      19  
      20  #define TEST_ALL(T)				\
      21    T (int8_t)					\
      22    T (uint8_t)					\
      23    T (int16_t)					\
      24    T (uint16_t)					\
      25    T (int32_t)					\
      26    T (uint32_t)					\
      27    T (int64_t)					\
      28    T (uint64_t)					\
      29    T (_Float16)					\
      30    T (float)					\
      31    T (double)
      32  
      33  TEST_ALL (VEC_PERM)
      34  
      35  /* The loop should be fully-masked.  */
      36  /* { dg-final { scan-assembler-times {\tld1b\t} 2 } } */
      37  /* { dg-final { scan-assembler-times {\tld1h\t} 3 } } */
      38  /* { dg-final { scan-assembler-times {\tld1w\t} 3 } } */
      39  /* { dg-final { scan-assembler-times {\tld1d\t} 3 } } */
      40  /* { dg-final { scan-assembler-not {\tldr} } } */
      41  
      42  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 } } */
      43  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 6 } } */
      44  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s} 6 } } */
      45  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d} 6 } } */
      46  
      47  /* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b\n} 2 } } */
      48  /* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h\n} 2 } } */
      49  /* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.s\n} 2 } } */
      50  /* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.d\n} 2 } } */
      51  /* { dg-final { scan-assembler-times {\tfadda\th[0-9]+, p[0-7], h[0-9]+, z[0-9]+\.h\n} 1 } } */
      52  /* { dg-final { scan-assembler-times {\tfadda\ts[0-9]+, p[0-7], s[0-9]+, z[0-9]+\.s\n} 1 } } */
      53  /* { dg-final { scan-assembler-times {\tfadda\td[0-9]+, p[0-7], d[0-9]+, z[0-9]+\.d\n} 1 } } */
      54  /* { dg-final { scan-assembler-not {\tfadd\n} } } */
      55  
      56  /* { dg-final { scan-assembler-not {\tuqdec} } } */