1  /* { dg-do compile } */
       2  /* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=scalable" } */
       3  
       4  #include <stdint.h>
       5  
       6  #define VEC_PERM(TYPE)						\
       7  TYPE __attribute__ ((noinline, noclone))			\
       8  vec_slp_##TYPE (TYPE *restrict a, TYPE b, TYPE c, int n)	\
       9  {								\
      10    for (int i = 0; i < n; ++i)					\
      11      {								\
      12        a[i * 2] += b;						\
      13        a[i * 2 + 1] += c;					\
      14      }								\
      15  }
      16  
      17  #define TEST_ALL(T)				\
      18    T (int8_t)					\
      19    T (uint8_t)					\
      20    T (int16_t)					\
      21    T (uint16_t)					\
      22    T (int32_t)					\
      23    T (uint32_t)					\
      24    T (int64_t)					\
      25    T (uint64_t)					\
      26    T (_Float16)					\
      27    T (float)					\
      28    T (double)
      29  
      30  TEST_ALL (VEC_PERM)
      31  
      32  /* We should use one DUP for each of the 8-, 16- and 32-bit types,
      33     although we currently use LD1RW for _Float16.  We should use two
      34     DUPs for each of the three 64-bit types.  */
      35  /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.h, [hw]} 2 } } */
      36  /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.s, [sw]} 2 } } */
      37  /* { dg-final { scan-assembler-times {\tld1rw\tz[0-9]+\.s, } 1 } } */
      38  /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, [dx]} 9 } } */
      39  /* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 3 } } */
      40  /* { dg-final { scan-assembler-not {\tzip2\t} } } */
      41  
      42  /* The loop should be fully-masked.  */
      43  /* { dg-final { scan-assembler-times {\tld1b\t} 2 } } */
      44  /* { dg-final { scan-assembler-times {\tst1b\t} 2 } } */
      45  /* { dg-final { scan-assembler-times {\tld1h\t} 3 } } */
      46  /* { dg-final { scan-assembler-times {\tst1h\t} 3 } } */
      47  /* { dg-final { scan-assembler-times {\tld1w\t} 3 } } */
      48  /* { dg-final { scan-assembler-times {\tst1w\t} 3 } } */
      49  /* { dg-final { scan-assembler-times {\tld1d\t} 3 } } */
      50  /* { dg-final { scan-assembler-times {\tst1d\t} 3 } } */
      51  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 } } */
      52  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 6 } } */
      53  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s} 6 } } */
      54  /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d} 6 } } */
      55  /* { dg-final { scan-assembler-not {\tldr} } } */
      56  /* { dg-final { scan-assembler-times {\tstr} 2 } } */
      57  /* { dg-final { scan-assembler-times {\tstr\th[0-9]+} 2 } } */
      58  
      59  /* { dg-final { scan-assembler-not {\tuqdec} } } */