1  /* { dg-do assemble { target aarch64_asm_sve_ok } } */
       2  /* { dg-options "-O -msve-vector-bits=256 --save-temps -mlittle-endian" } */
       3  
       4  typedef __UINT32_TYPE__ vnx4si __attribute__((vector_size (32)));
       5  typedef float vnx4sf __attribute__((vector_size (32)));
       6  
       7  #define MASK_2(X, Y) (X) ^ (Y), (X + 1) ^ (Y)
       8  #define MASK_4(X, Y) MASK_2 (X, Y), MASK_2 (X + 2, Y)
       9  #define MASK_8(X, Y) MASK_4 (X, Y), MASK_4 (X + 4, Y)
      10  
      11  #define INDEX_8 vnx4si
      12  
      13  #define PERMUTE(TYPE, NUNITS, REV_NUNITS)				\
      14    TYPE permute_##TYPE##_##REV_NUNITS (TYPE values1, TYPE values2)	\
      15    {									\
      16      return __builtin_shuffle						\
      17        (values1, values2,						\
      18         ((INDEX_##NUNITS) { MASK_##NUNITS (0, REV_NUNITS - 1) }));	\
      19    }
      20  
      21  #define TEST_ALL(T)				\
      22    T (vnx4si, 8, 2)				\
      23    T (vnx4sf, 8, 2)
      24  
      25  TEST_ALL (PERMUTE)
      26  
      27  /* { dg-final { scan-assembler-not {\ttbl\t} } } */
      28  
      29  /* { dg-final { scan-assembler-times {\trevw\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d} 2 } } */