(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
sve/
peel_ind_1.c
       1  /* { dg-do compile } */
       2  /* Pick an arbitrary target for which unaligned accesses are more
       3     expensive.  */
       4  /* { dg-options "-O3 -msve-vector-bits=256 -mtune=thunderx" } */
       5  
       6  #define N 512
       7  #define START 1
       8  #define END 505
       9  
      10  int x[N] __attribute__((aligned(32)));
      11  
      12  void __attribute__((noinline, noclone))
      13  foo (void)
      14  {
      15    unsigned int v = 0;
      16    for (unsigned int i = START; i < END; ++i)
      17      {
      18        x[i] = v;
      19        v += 5;
      20      }
      21  }
      22  
      23  /* We should operate on aligned vectors.  */
      24  /* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, (x|\.LANCHOR0)\n} } } */
      25  /* We should use an induction that starts at -5, with only the last
      26     7 elements of the first iteration being active.  */
      27  /* { dg-final { scan-assembler {\tindex\tz[0-9]+\.s, #-5, #5\n} } } */
      28  /* { dg-final { scan-assembler {\tptrue\t(p[0-9]+\.b), vl1\n.*\tnot\tp[0-7]\.b, p[0-7]/z, \1\n} } } */