1 /* { dg-options "-O -msve-vector-bits=512" } */
2 /* { dg-final { check-function-bodies "**" "" } } */
3
4 #include "struct.h"
5
6 #define CONSUME(VAR) \
7 { \
8 register void *ptr_ asm ("x7") = &(VAR); \
9 asm volatile ("" :: "r" (ptr_) : "memory"); \
10 }
11
12 #define SEL2(TAG, TYPE) \
13 TAG TYPE \
14 sel2_##TYPE (TAG TYPE x, TAG TYPE y) \
15 { \
16 return y; \
17 }
18
19 #define WRAP(TYPE) \
20 struct wrap_##TYPE \
21 { \
22 TYPE data; \
23 }; \
24 SEL2 (struct, wrap_##TYPE)
25
26 /*
27 ** sel2_wrap_fixed_int8_t:
28 ** mov z0\.d, z1\.d
29 ** ret
30 */
31 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_int8_t\n} } } */
32 WRAP (fixed_int8_t);
33
34 /*
35 ** sel2_wrap_fixed_int16_t:
36 ** mov z0\.d, z1\.d
37 ** ret
38 */
39 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_int16_t\n} } } */
40 WRAP (fixed_int16_t);
41
42 /*
43 ** sel2_wrap_fixed_int32_t:
44 ** mov z0\.d, z1\.d
45 ** ret
46 */
47 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_int32_t\n} } } */
48 WRAP (fixed_int32_t);
49
50 /*
51 ** sel2_wrap_fixed_int64_t:
52 ** mov z0\.d, z1\.d
53 ** ret
54 */
55 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_int64_t\n} } } */
56 WRAP (fixed_int64_t);
57
58 /*
59 ** sel2_wrap_fixed_uint8_t:
60 ** mov z0\.d, z1\.d
61 ** ret
62 */
63 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_uint8_t\n} } } */
64 WRAP (fixed_uint8_t);
65
66 /*
67 ** sel2_wrap_fixed_uint16_t:
68 ** mov z0\.d, z1\.d
69 ** ret
70 */
71 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_uint16_t\n} } } */
72 WRAP (fixed_uint16_t);
73
74 /*
75 ** sel2_wrap_fixed_uint32_t:
76 ** mov z0\.d, z1\.d
77 ** ret
78 */
79 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_uint32_t\n} } } */
80 WRAP (fixed_uint32_t);
81
82 /*
83 ** sel2_wrap_fixed_uint64_t:
84 ** mov z0\.d, z1\.d
85 ** ret
86 */
87 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_uint64_t\n} } } */
88 WRAP (fixed_uint64_t);
89
90 /*
91 ** sel2_wrap_fixed_bfloat16_t:
92 ** mov z0\.d, z1\.d
93 ** ret
94 */
95 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_bfloat16_t\n} } } */
96 WRAP (fixed_bfloat16_t);
97
98 /*
99 ** sel2_wrap_fixed_float16_t:
100 ** mov z0\.d, z1\.d
101 ** ret
102 */
103 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_float16_t\n} } } */
104 WRAP (fixed_float16_t);
105
106 /*
107 ** sel2_wrap_fixed_float32_t:
108 ** mov z0\.d, z1\.d
109 ** ret
110 */
111 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_float32_t\n} } } */
112 WRAP (fixed_float32_t);
113
114 /*
115 ** sel2_wrap_fixed_float64_t:
116 ** mov z0\.d, z1\.d
117 ** ret
118 */
119 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_float64_t\n} } } */
120 WRAP (fixed_float64_t);
121
122 /*
123 ** sel2_wrap_fixed_bool_t:
124 ** mov p0\.b, p1\.b
125 ** ret
126 */
127 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_bool_t\n} } } */
128 WRAP (fixed_bool_t);
129
130 struct pst_arr1
131 {
132 fixed_uint8_t u8[1];
133 };
134
135 /*
136 ** sel2_pst_arr1:
137 ** mov z0\.d, z1\.d
138 ** ret
139 */
140 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr1\n} } } */
141 SEL2 (struct, pst_arr1)
142
143 /*
144 ** test_pst_arr1:
145 ** eor z0\.b, z0\.b, #(?:0x)?1
146 ** ret
147 */
148 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr1\n} } } */
149 svuint8_t
150 test_pst_arr1 (struct pst_arr1 x)
151 {
152 return sveor_x (svptrue_b8 (), x.u8[0], 1);
153 }
154
155 struct pst_arr2
156 {
157 fixed_uint8_t u8[2];
158 };
159 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr2\n} } } */
160 SEL2 (struct, pst_arr2)
161
162 /*
163 ** test_pst_arr2:
164 ** sub z0\.b, z0\.b, z1\.b
165 ** ret
166 */
167 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr2\n} } } */
168 svuint8_t
169 test_pst_arr2 (struct pst_arr2 x)
170 {
171 return svsub_x (svptrue_b8 (), x.u8[0], x.u8[1]);
172 }
173
174 struct pst_arr3
175 {
176 fixed_uint16_t u16[3];
177 };
178 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr3\n} } } */
179 SEL2 (struct, pst_arr3)
180
181 /*
182 ** test_pst_arr3:
183 ** sub z0\.h, z0\.h, z2\.h
184 ** ret
185 */
186 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr3\n} } } */
187 svuint16_t
188 test_pst_arr3 (struct pst_arr3 x)
189 {
190 return svsub_x (svptrue_b8 (), x.u16[0], x.u16[2]);
191 }
192
193 struct pst_arr4
194 {
195 fixed_uint32_t u32[4];
196 };
197 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr4\n} } } */
198 SEL2 (struct, pst_arr4)
199
200 /*
201 ** test_pst_arr4:
202 ** sub z0\.s, z0\.s, z3\.s
203 ** ret
204 */
205 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr4\n} } } */
206 svuint32_t
207 test_pst_arr4 (struct pst_arr4 x)
208 {
209 return svsub_x (svptrue_b8 (), x.u32[0], x.u32[3]);
210 }
211
212 struct pst_arr5
213 {
214 fixed_uint64_t u64[2][2][2];
215 };
216 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr5\n} } } */
217 SEL2 (struct, pst_arr5)
218
219 /*
220 ** test_pst_arr5: { target aarch64_little_endian }
221 ** sub sp, sp, #512
222 ** str z0, \[sp\]
223 ** str z1, \[sp, #1, mul vl\]
224 ** str z2, \[sp, #2, mul vl\]
225 ** str z3, \[sp, #3, mul vl\]
226 ** str z4, \[sp, #4, mul vl\]
227 ** str z5, \[sp, #5, mul vl\]
228 ** str z6, \[sp, #6, mul vl\]
229 ** str z7, \[sp, #7, mul vl\]
230 ** mov (x7, sp|w7, wsp)
231 ** add sp, sp, #?512
232 ** ret
233 */
234 /*
235 ** test_pst_arr5: { target aarch64_big_endian }
236 ** sub sp, sp, #512
237 ** ptrue (p[0-3])\.b, vl64
238 ** st1d z0\.d, \1, \[sp\]
239 ** st1d z1\.d, \1, \[sp, #1, mul vl\]
240 ** st1d z2\.d, \1, \[sp, #2, mul vl\]
241 ** st1d z3\.d, \1, \[sp, #3, mul vl\]
242 ** st1d z4\.d, \1, \[sp, #4, mul vl\]
243 ** st1d z5\.d, \1, \[sp, #5, mul vl\]
244 ** st1d z6\.d, \1, \[sp, #6, mul vl\]
245 ** st1d z7\.d, \1, \[sp, #7, mul vl\]
246 ** mov ((x7, sp|w7, wsp)|w7, wsp)
247 ** add sp, sp, #?512
248 ** ret
249 */
250 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr5\n} } } */
251 void
252 test_pst_arr5 (struct pst_arr5 x)
253 {
254 CONSUME (x);
255 }
256
257 /*
258 ** test_pst_arr5_x0:
259 ** (
260 ** mov z0\.d, z7\.d
261 ** mov (x7, x0|w7, w0)
262 ** |
263 ** mov (x7, x0|w7, w0)
264 ** mov z0\.d, z7\.d
265 ** )
266 ** ret
267 */
268 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr5_x0\n} } } */
269 svint32_t
270 test_pst_arr5_x0 (svint32_t z0, struct pst_arr5 x,
271 svint32_t z1, svint32_t z2, svint32_t z3, svint32_t z4,
272 svint32_t z5, svint32_t z6, svint32_t z7)
273 {
274 CONSUME (x);
275 return z7;
276 }
277
278 /*
279 ** test_pst_arr5_x7:
280 ** ret
281 */
282 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr5_x7\n} } } */
283 svint32_t
284 test_pst_arr5_x7 (svint32_t z0, int x0, int x1, int x2, int x3, int x4,
285 int x5, int x6, struct pst_arr5 x)
286 {
287 CONSUME (x);
288 return z0;
289 }
290
291 /*
292 ** test_pst_arr5_sp: { target lp64 }
293 ** ldr x7, \[sp\]
294 ** ret
295 */
296 /*
297 ** test_pst_arr5_sp: { target ilp32 }
298 ** ldr w7, \[sp(, 4)?\]
299 ** ret
300 */
301 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr5_sp\n} } } */
302 svint32_t
303 test_pst_arr5_sp (svint32_t z0, int x0, int x1, int x2, int x3, int x4,
304 int x5, int x6, int x7, struct pst_arr5 x)
305 {
306 CONSUME (x);
307 return z0;
308 }
309
310 struct pst_arr6
311 {
312 fixed_bool_t b[2][2];
313 };
314 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr6\n} } } */
315 SEL2 (struct, pst_arr6)
316
317 /*
318 ** test_pst_arr6:
319 ** ...
320 ** brkpa p0\.b, p0/z, p2\.b, p3\.b
321 ** ...
322 */
323 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr6\n} } } */
324 fixed_bool_t
325 test_pst_arr6 (struct pst_arr6 x)
326 {
327 return svbrkpa_z (x.b[0][0], x.b[1][0], x.b[1][1]);
328 }
329
330 /*
331 ** test_pst_arr6_x0:
332 ** (
333 ** mov p0\.b, p3\.b
334 ** mov (x7, x0|w7, w0)
335 ** |
336 ** mov (x7, x0|w7, w0)
337 ** mov p0\.b, p3\.b
338 ** )
339 ** ret
340 */
341 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr6_x0\n} } } */
342 fixed_bool_t
343 test_pst_arr6_x0 (svbool_t p0, struct pst_arr6 x, svbool_t p1, svbool_t p2,
344 svbool_t p3)
345 {
346 CONSUME (x);
347 return p3;
348 }
349
350 /*
351 ** test_pst_arr6_x7:
352 ** ret
353 */
354 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr6_x7\n} } } */
355 fixed_bool_t
356 test_pst_arr6_x7 (svbool_t p0, int x0, int x1, int x2, int x3, int x4,
357 int x5, int x6, struct pst_arr6 x)
358 {
359 CONSUME (x);
360 return p0;
361 }
362
363 /*
364 ** test_pst_arr6_sp: { target lp64 }
365 ** ldr x7, \[sp\]
366 ** ret
367 */
368 /*
369 ** test_pst_arr6_sp: { target ilp32 }
370 ** ldr w7, \[sp(, 4)?\]
371 ** ret
372 */
373 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr6_sp\n} } } */
374 fixed_bool_t
375 test_pst_arr6_sp (svbool_t p0, int x0, int x1, int x2, int x3, int x4,
376 int x5, int x6, int x7, struct pst_arr6 x)
377 {
378 CONSUME (x);
379 return p0;
380 }
381
382 struct pst_uniform1
383 {
384 fixed_int8_t a, b;
385 };
386 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_uniform1\n} } } */
387 SEL2 (struct, pst_uniform1)
388
389 /*
390 ** test_pst_uniform1: { target aarch64_little_endian }
391 ** sub sp, sp, #128
392 ** str z0, \[sp\]
393 ** str z1, \[sp, #1, mul vl\]
394 ** mov (x7, sp|w7, wsp)
395 ** add sp, sp, #?128
396 ** ret
397 */
398 /*
399 ** test_pst_uniform1: { target aarch64_big_endian }
400 ** sub sp, sp, #128
401 ** ptrue (p[0-3])\.b, vl64
402 ** st1b z0\.b, \1, \[sp\]
403 ** st1b z1\.b, \1, \[sp, #1, mul vl\]
404 ** mov (x7, sp|w7, wsp)
405 ** add sp, sp, #?128
406 ** ret
407 */
408 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_uniform1\n} } } */
409 void
410 test_pst_uniform1 (struct pst_uniform1 x)
411 {
412 CONSUME (x);
413 }
414
415 struct pst_uniform2
416 {
417 fixed_int16_t a;
418 fixed_int16_t b[2];
419 };
420 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_uniform2\n} } } */
421 SEL2 (struct, pst_uniform2)
422
423 /*
424 ** test_pst_uniform2: { target aarch64_little_endian }
425 ** sub sp, sp, #192
426 ** str z0, \[sp\]
427 ** str z1, \[sp, #1, mul vl\]
428 ** str z2, \[sp, #2, mul vl\]
429 ** mov (x7, sp|w7, wsp)
430 ** add sp, sp, #?192
431 ** ret
432 */
433 /*
434 ** test_pst_uniform2: { target aarch64_big_endian }
435 ** sub sp, sp, #192
436 ** ptrue (p[0-3])\.b, vl64
437 ** st1h z0\.h, \1, \[sp\]
438 ** st1h z1\.h, \1, \[sp, #1, mul vl\]
439 ** st1h z2\.h, \1, \[sp, #2, mul vl\]
440 ** mov (x7, sp|w7, wsp)
441 ** add sp, sp, #?192
442 ** ret
443 */
444 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_uniform2\n} } } */
445 void
446 test_pst_uniform2 (struct pst_uniform2 x)
447 {
448 CONSUME (x);
449 }
450
451 struct pst_uniform3
452 {
453 fixed_int32_t a;
454 fixed_int32_t b[2];
455 fixed_int32_t c;
456 };
457 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_uniform3\n} } } */
458 SEL2 (struct, pst_uniform3)
459
460 /*
461 ** test_pst_uniform3: { target aarch64_little_endian }
462 ** sub sp, sp, #256
463 ** str z0, \[sp\]
464 ** str z1, \[sp, #1, mul vl\]
465 ** str z2, \[sp, #2, mul vl\]
466 ** str z3, \[sp, #3, mul vl\]
467 ** mov (x7, sp|w7, wsp)
468 ** add sp, sp, #?256
469 ** ret
470 */
471 /*
472 ** test_pst_uniform3: { target aarch64_big_endian }
473 ** sub sp, sp, #256
474 ** ptrue (p[0-3])\.b, vl64
475 ** st1w z0\.s, \1, \[sp\]
476 ** st1w z1\.s, \1, \[sp, #1, mul vl\]
477 ** st1w z2\.s, \1, \[sp, #2, mul vl\]
478 ** st1w z3\.s, \1, \[sp, #3, mul vl\]
479 ** mov (x7, sp|w7, wsp)
480 ** add sp, sp, #?256
481 ** ret
482 */
483 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_uniform3\n} } } */
484 void
485 test_pst_uniform3 (struct pst_uniform3 x)
486 {
487 CONSUME (x);
488 }
489
490 struct pst_uniform4
491 {
492 fixed_int32_t a __attribute__((aligned(SVE_BYTES * 2)));
493 fixed_int32_t b[3] __attribute__((aligned(SVE_BYTES * 2)));
494 fixed_int32_t c __attribute__((aligned(SVE_BYTES * 2)));
495 };
496 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_uniform4\n} } } */
497 SEL2 (struct, pst_uniform4)
498
499 /*
500 ** test_pst_uniform4: { target aarch64_little_endian }
501 ** sub sp, sp, #624
502 ** add (x[0-9]+), sp, #?127
503 ** and x7, \1, #?(?:-128|4294967168)
504 ** ptrue (p[0-7])\.b, vl64
505 ** st1w z0\.s, \2, \[x7\]
506 ** add (x[0-9]+), x7, #?128
507 ** str z1, \[\3\]
508 ** str z2, \[\3, #1, mul vl\]
509 ** str z3, \[\3, #2, mul vl\]
510 ** st1w z4\.s, \2, \[x7, #6, mul vl\]
511 ** add sp, sp, #?624
512 ** ret
513 */
514 /*
515 ** test_pst_uniform4: { target aarch64_big_endian }
516 ** sub sp, sp, #624
517 ** add (x[0-9]+), sp, #?127
518 ** and x7, \1, #?(?:-128|4294967168)
519 ** ptrue (p[0-7])\.b, vl64
520 ** st1w z0\.s, \2, \[x7\]
521 ** add (x[0-9]+), x7, #?128
522 ** st1w z1\.s, \2, \[\3\]
523 ** st1w z2\.s, \2, \[\3, #1, mul vl\]
524 ** st1w z3\.s, \2, \[\3, #2, mul vl\]
525 ** st1w z4\.s, \2, \[x7, #6, mul vl\]
526 ** add sp, sp, #?624
527 ** ret
528 */
529 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_uniform4\n} } } */
530 void
531 test_pst_uniform4 (struct pst_uniform4 x)
532 {
533 CONSUME (x);
534 }
535
536 struct pst_mixed1
537 {
538 fixed_bool_t p0;
539 fixed_bfloat16_t z0;
540 fixed_float16_t z1;
541 fixed_float32_t z2;
542 fixed_float64_t z3;
543 fixed_bool_t p1;
544 fixed_bool_t p2;
545 fixed_int8_t z4;
546 fixed_int16_t z5;
547 fixed_int32_t z6;
548 fixed_int64_t z7;
549 fixed_bool_t p3;
550 };
551 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_mixed1\n} } } */
552 SEL2 (struct, pst_mixed1)
553
554 /*
555 ** test_pst_mixed1:
556 ** sub sp, sp, #560
557 ** str p0, \[sp\]
558 ** ptrue p0\.b, vl64
559 ** add (x[0-9+]), sp, #?16
560 ** st1h z0\.h, p0, \[\1\]
561 ** add (x[0-9+]), sp, #?80
562 ** st1h z1\.h, p0, \[\2\]
563 ** add (x[0-9+]), sp, #?144
564 ** st1w z2\.s, p0, \[\3\]
565 ** add (x[0-9+]), sp, #?208
566 ** st1d z3\.d, p0, \[\4\]
567 ** str p1, \[sp, #34, mul vl\]
568 ** str p2, \[sp, #35, mul vl\]
569 ** add (x[0-9+]), sp, #?288
570 ** st1b z4\.b, p0, \[\5\]
571 ** add (x[0-9+]), sp, #?352
572 ** st1h z5\.h, p0, \[\6\]
573 ** add (x[0-9+]), sp, #?416
574 ** st1w z6\.s, p0, \[\7\]
575 ** add (x[0-9+]), sp, #?480
576 ** st1d z7\.d, p0, \[\8\]
577 ** str p3, \[sp, #68, mul vl\]
578 ** mov (x7, sp|w7, wsp)
579 ** add sp, sp, #?560
580 ** ret
581 */
582 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_mixed1\n} } } */
583 void
584 test_pst_mixed1 (struct pst_mixed1 x)
585 {
586 CONSUME (x);
587 }
588
589 struct pst_mixed2
590 {
591 struct __attribute__ ((packed)) {
592 fixed_bool_t p;
593 fixed_int8_t z;
594 } a[3];
595 fixed_int16_t b[1][1][1][4];
596 };
597 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_mixed2\n} } } */
598 SEL2 (struct, pst_mixed2)
599
600 /*
601 ** test_pst_mixed2: { target aarch64_little_endian }
602 ** sub sp, sp, #480
603 ** str p0, \[sp\]
604 ** ptrue (p[03])\.b, vl64
605 ** add (x[0-9]+), sp, #?8
606 ** st1b z0\.b, \1, \[\2\]
607 ** str p1, \[sp, #9, mul vl\]
608 ** add (x[0-9]+), sp, #?80
609 ** st1b z1\.b, \1, \[\3\]
610 ** str p2, \[sp, #18, mul vl\]
611 ** add (x[0-9]+), sp, #?152
612 ** st1b z2\.b, \1, \[\4\]
613 ** add (x[0-9]+), sp, #?224
614 ** str z3, \[\5\]
615 ** str z4, \[\5, #1, mul vl\]
616 ** str z5, \[\5, #2, mul vl\]
617 ** str z6, \[\5, #3, mul vl\]
618 ** mov (x7, sp|w7, wsp)
619 ** add sp, sp, #?480
620 ** ret
621 */
622 /*
623 ** test_pst_mixed2: { target aarch64_big_endian }
624 ** sub sp, sp, #480
625 ** str p0, \[sp\]
626 ** ptrue (p[03])\.b, vl64
627 ** add (x[0-9]+), sp, #?8
628 ** st1b z0\.b, \1, \[\2\]
629 ** str p1, \[sp, #9, mul vl\]
630 ** add (x[0-9]+), sp, #?80
631 ** st1b z1\.b, \1, \[\3\]
632 ** str p2, \[sp, #18, mul vl\]
633 ** add (x[0-9]+), sp, #?152
634 ** st1b z2\.b, \1, \[\4\]
635 ** add (x[0-9]+), sp, #?224
636 ** st1h z3\.h, \1, \[\5\]
637 ** st1h z4\.h, \1, \[\5, #1, mul vl\]
638 ** st1h z5\.h, \1, \[\5, #2, mul vl\]
639 ** st1h z6\.h, \1, \[\5, #3, mul vl\]
640 ** mov (x7, sp|w7, wsp)
641 ** add sp, sp, #?480
642 ** ret
643 */
644 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_mixed2\n} } } */
645 void
646 test_pst_mixed2 (struct pst_mixed2 x)
647 {
648 CONSUME (x);
649 }
650
651 struct pst_big1
652 {
653 fixed_int8_t a[9];
654 };
655 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_big1\n} } } */
656 SEL2 (struct, pst_big1)
657
658 /*
659 ** test_pst_big1_a: { target lp64 }
660 ** ptrue (p[0-7])\.b, vl64
661 ** ld1b z0\.b, \1/z, \[x0\]
662 ** ret
663 */
664 /*
665 ** test_pst_big1_a: { target ilp32 }
666 ** uxtw x0, w0
667 ** ptrue (p[0-7])\.b, vl64
668 ** ld1b z0\.b, \1/z, \[x0\]
669 ** ret
670 */
671 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big1_a\n} } } */
672 svint8_t
673 test_pst_big1_a (struct pst_big1 x)
674 {
675 return x.a[0];
676 }
677
678 /*
679 ** test_pst_big1_b: { target lp64 }
680 ** add x7, x0, #?512
681 ** ret
682 */
683 /*
684 ** test_pst_big1_b: { target ilp32 }
685 ** add w7, w0, #?512
686 ** ret
687 */
688 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big1_b\n} } } */
689 svint8_t
690 test_pst_big1_b (struct pst_big1 x)
691 {
692 CONSUME (x.a[8]);
693 }
694
695 struct pst_big2
696 {
697 fixed_bool_t a[5];
698 };
699 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_big2\n} } } */
700 SEL2 (struct, pst_big2)
701
702 /*
703 ** test_pst_big2_a: { target lp64 }
704 ** ldr p0, \[x0\]
705 ** ret
706 */
707 /*
708 ** test_pst_big2_a: { target ilp32 }
709 ** uxtw x0, w0
710 ** ldr p0, \[x0\]
711 ** ret
712 */
713 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big2_a\n} } } */
714 svbool_t
715 test_pst_big2_a (struct pst_big2 x)
716 {
717 return x.a[0];
718 }
719
720 /*
721 ** test_pst_big2_b: { target lp64 }
722 ** ldr p0, \[x0, #4, mul vl\]
723 ** ret
724 */
725 /*
726 ** test_pst_big2_b: { target ilp32 }
727 ** uxtw x0, w0
728 ** ldr p0, \[x0, #4, mul vl\]
729 ** ret
730 */
731 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big2_b\n} } } */
732 svbool_t
733 test_pst_big2_b (struct pst_big2 x)
734 {
735 return x.a[4];
736 }
737
738 struct pst_big3
739 {
740 fixed_bool_t p0;
741 fixed_int8_t a[2];
742 fixed_bool_t p1;
743 fixed_bool_t p2;
744 fixed_bool_t p3;
745 fixed_int8_t b[6];
746 fixed_bool_t p4;
747 };
748 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_big3\n} } } */
749 SEL2 (struct, pst_big3)
750
751 /*
752 ** test_pst_big3_a: { target lp64 }
753 ** ldr p0, \[x0\]
754 ** ret
755 */
756 /*
757 ** test_pst_big3_a: { target ilp32 }
758 ** uxtw x0, w0
759 ** ldr p0, \[x0\]
760 ** ret
761 */
762 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_a\n} } } */
763 svbool_t
764 test_pst_big3_a (struct pst_big3 x)
765 {
766 return x.p0;
767 }
768
769 /*
770 ** test_pst_big3_b: { target lp64 }
771 ** ldr p0, \[x0, #18, mul vl\]
772 ** ret
773 */
774 /*
775 ** test_pst_big3_b: { target ilp32 }
776 ** uxtw x0, w0
777 ** ldr p0, \[x0, #18, mul vl\]
778 ** ret
779 */
780 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_b\n} } } */
781 svbool_t
782 test_pst_big3_b (struct pst_big3 x)
783 {
784 return x.p1;
785 }
786
787 /*
788 ** test_pst_big3_c: { target lp64 }
789 ** ldr p0, \[x0, #19, mul vl\]
790 ** ret
791 */
792 /*
793 ** test_pst_big3_c: { target ilp32 }
794 ** uxtw x0, w0
795 ** ldr p0, \[x0, #19, mul vl\]
796 ** ret
797 */
798 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_c\n} } } */
799 svbool_t
800 test_pst_big3_c (struct pst_big3 x)
801 {
802 return x.p2;
803 }
804
805 /*
806 ** test_pst_big3_d: { target lp64 }
807 ** ldr p0, \[x0, #70, mul vl\]
808 ** ret
809 */
810 /*
811 ** test_pst_big3_d: { target ilp32 }
812 ** uxtw x0, w0
813 ** ldr p0, \[x0, #70, mul vl\]
814 ** ret
815 */
816 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_d\n} } } */
817 svbool_t
818 test_pst_big3_d (struct pst_big3 x)
819 {
820 return x.p4;
821 }
822
823 /*
824 ** test_pst_big3_e: { target lp64 }
825 ** add (x[0-9]+), x0, #?16
826 ** ptrue (p[0-7])\.b, vl64
827 ** ld1b z0\.b, \2/z, \[\1\]
828 ** ret
829 */
830 /*
831 ** test_pst_big3_e: { target ilp32 }
832 ** uxtw x0, w0
833 ** add (x[0-9]+), x0, #?16
834 ** ptrue (p[0-7])\.b, vl64
835 ** ld1b z0\.b, \2/z, \[\1\]
836 ** ret
837 */
838 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_e\n} } } */
839 svint8_t
840 test_pst_big3_e (struct pst_big3 x)
841 {
842 return x.a[0];
843 }
844
845 /*
846 ** test_pst_big3_f: { target lp64 }
847 ** add (x[0-9]+), x0, #?240
848 ** ptrue (p[0-7])\.b, vl64
849 ** ld1b z0\.b, \2/z, \[\1\]
850 ** ret
851 */
852 /*
853 ** test_pst_big3_f: { target ilp32 }
854 ** uxtw x0, w0
855 ** add (x[0-9]+), x0, #?240
856 ** ptrue (p[0-7])\.b, vl64
857 ** ld1b z0\.b, \2/z, \[\1\]
858 ** ret
859 */
860 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_f\n} } } */
861 svint8_t
862 test_pst_big3_f (struct pst_big3 x)
863 {
864 return x.b[1];
865 }
866
867 struct pst_zero1
868 {
869 fixed_bool_t a[0];
870 fixed_int32_t b;
871 };
872 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_zero1\n} } } */
873 SEL2 (struct, pst_zero1)
874
875 /*
876 ** test_pst_zero1:
877 ** ret
878 */
879 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_zero1\n} } } */
880 svint32_t
881 test_pst_zero1 (struct pst_zero1 x)
882 {
883 return x.b;
884 }
885
886 struct pst_zero2
887 {
888 unsigned int : 0;
889 fixed_bool_t b;
890 };
891 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_zero2\n} } } */
892 SEL2 (struct, pst_zero2)
893
894 /*
895 ** test_pst_zero2:
896 ** (
897 ** sub sp, sp, #16
898 ** add sp, sp, #?16
899 ** |
900 ** )
901 ** ret
902 */
903 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_zero2\n} } } */
904 svbool_t
905 test_pst_zero2 (struct pst_zero2 x)
906 {
907 return x.b;
908 }
909
910 struct pst_zero3
911 {
912 struct {} empty;
913 fixed_uint64_t b;
914 };
915 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_zero3\n} } } */
916 SEL2 (struct, pst_zero3)
917
918 /*
919 ** test_pst_zero3:
920 ** ret
921 */
922 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_zero3\n} } } */
923 svuint64_t
924 test_pst_zero3 (struct pst_zero3 x)
925 {
926 return x.b;
927 }
928
929 typedef unsigned char small_vec __attribute__((vector_size(SVE_BYTES / 4)));
930
931 struct nonpst1
932 {
933 small_vec a[4];
934 };
935 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst1\n} } } */
936 SEL2 (struct, nonpst1)
937
938 /*
939 ** test_nonpst1:
940 ** mov v0\.16b, v3\.16b
941 ** ret
942 */
943 /* { dg-final { scan-assembler-not {\t\.variant_pcs\ttest_nonpst1\n} } } */
944 small_vec
945 test_nonpst1 (struct nonpst1 x)
946 {
947 return x.a[3];
948 }
949
950 union nonpst2
951 {
952 struct {
953 fixed_bool_t a[0];
954 fixed_int32_t b;
955 };
956 };
957 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst2\n} } } */
958 SEL2 (union, nonpst2)
959
960 /*
961 ** test_nonpst2: { target lp64 }
962 ** ptrue (p[0-7])\.b, vl64
963 ** ld1w z0\.s, \1/z, \[x0\]
964 ** ret
965 */
966 /*
967 ** test_nonpst2: { target ilp32 }
968 ** uxtw x0, w0
969 ** ptrue (p[0-7])\.b, vl64
970 ** ld1w z0\.s, \1/z, \[x0\]
971 ** ret
972 */
973 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst2\n} } } */
974 svint32_t
975 test_nonpst2 (union nonpst2 x)
976 {
977 return x.b;
978 }
979
980 /*
981 ** ret_nonpst2:
982 ** ptrue (p[0-7])\.b, vl64
983 ** index (z[0-9]+\.s), #1, #2
984 ** st1w \2, \1, \[x8\]
985 ** ret
986 */
987 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tret_nonpst2\n} } } */
988 union nonpst2
989 ret_nonpst2 (void)
990 {
991 return (union nonpst2) { { {}, 1, 3, 5, 7, 9, 11, 13, 15,
992 17, 19, 21, 23, 25, 27, 29, 31 } };
993 }
994
995 union nonpst3
996 {
997 struct {
998 unsigned int : 0;
999 fixed_bool_t b;
1000 };
1001 };
1002 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst3\n} } } */
1003 SEL2 (union, nonpst3)
1004
1005 /*
1006 ** test_nonpst3:
1007 ** sub sp, sp, #16
1008 ** str x0, \[sp, #?8\]
1009 ** ldr p0, \[sp, #1, mul vl\]
1010 ** add sp, sp, #?16
1011 ** ret
1012 */
1013 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst3\n} } } */
1014 svbool_t
1015 test_nonpst3 (union nonpst3 x)
1016 {
1017 return x.b;
1018 }
1019
1020 /*
1021 ** ret_nonpst3:
1022 ** mov x0, -1
1023 ** ret
1024 */
1025 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tret_nonpst3\n} } } */
1026 union nonpst3
1027 ret_nonpst3 (void)
1028 {
1029 return (union nonpst3) { { svptrue_b8 () } };
1030 }
1031
1032 union nonpst4
1033 {
1034 struct {
1035 struct {} empty;
1036 fixed_uint64_t b;
1037 };
1038 };
1039 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst4\n} } } */
1040 SEL2 (union, nonpst4)
1041
1042 /*
1043 ** test_nonpst4: { target lp64 }
1044 ** ptrue (p[0-7])\.b, vl64
1045 ** ld1d z0\.d, \1/z, \[x0\]
1046 ** ret
1047 */
1048 /*
1049 ** test_nonpst4: { target ilp32 }
1050 ** uxtw x0, w0
1051 ** ptrue (p[0-7])\.b, vl64
1052 ** ld1d z0\.d, \1/z, \[x0\]
1053 ** ret
1054 */
1055 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst4\n} } } */
1056 svuint64_t
1057 test_nonpst4 (union nonpst4 x)
1058 {
1059 return x.b;
1060 }
1061
1062 /*
1063 ** ret_nonpst4:
1064 ** ptrue (p[0-7])\.b, vl64
1065 ** index (z[0-9]+\.d), #1, #1
1066 ** st1d \2, \1, \[x8\]
1067 ** ret
1068 */
1069 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tret_nonpst4\n} } } */
1070 union nonpst4
1071 ret_nonpst4 (void)
1072 {
1073 return (union nonpst4) { { {}, 1, 2, 3, 4, 5, 6, 7, 8 } };
1074 }
1075
1076 struct nonpst5
1077 {
1078 union {
1079 fixed_uint16_t b;
1080 };
1081 };
1082 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst5\n} } } */
1083 SEL2 (struct, nonpst5)
1084
1085 /*
1086 ** test_nonpst5: { target lp64 }
1087 ** ptrue (p[0-7])\.b, vl64
1088 ** ld1h z0\.h, \1/z, \[x0\]
1089 ** ret
1090 */
1091 /*
1092 ** test_nonpst5: { target ilp32 }
1093 ** uxtw x0, w0
1094 ** ptrue (p[0-7])\.b, vl64
1095 ** ld1h z0\.h, \1/z, \[x0\]
1096 ** ret
1097 */
1098 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst5\n} } } */
1099 svuint16_t
1100 test_nonpst5 (struct nonpst5 x)
1101 {
1102 return x.b;
1103 }
1104
1105 struct nonpst6
1106 {
1107 fixed_uint64_t b;
1108 fixed_uint64_t *ptr;
1109 };
1110 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst6\n} } } */
1111 SEL2 (struct, nonpst6)
1112
1113 /*
1114 ** test_nonpst6: { target lp64 }
1115 ** ptrue (p[0-3])\.b, vl64
1116 ** ld1d z0\.d, \1/z, \[x0\]
1117 ** ret
1118 */
1119 /*
1120 ** test_nonpst6: { target ilp32 }
1121 ** uxtw x0, w0
1122 ** ptrue (p[0-3])\.b, vl64
1123 ** ld1d z0\.d, \1/z, \[x0\]
1124 ** ret
1125 */
1126 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst6\n} } } */
1127 svuint64_t
1128 test_nonpst6 (struct nonpst6 x)
1129 {
1130 return x.b;
1131 }
1132
1133 struct nonpst7
1134 {
1135 fixed_uint64_t b;
1136 uint32_t foo __attribute__((vector_size(SVE_BYTES)));
1137 };
1138 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst7\n} } } */
1139 SEL2 (struct, nonpst7)
1140
1141 /*
1142 ** test_nonpst7: { target lp64 }
1143 ** ptrue (p[0-3])\.b, vl64
1144 ** ld1d z0\.d, \1/z, \[x0\]
1145 ** ret
1146 */
1147 /*
1148 ** test_nonpst7: { target ilp32 }
1149 ** uxtw x0, w0
1150 ** ptrue (p[0-3])\.b, vl64
1151 ** ld1d z0\.d, \1/z, \[x0\]
1152 ** ret
1153 */
1154 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst7\n} } } */
1155 svuint64_t
1156 test_nonpst7 (struct nonpst7 x)
1157 {
1158 return x.b;
1159 }
1160
1161 typedef unsigned char tiny_vec __attribute__((vector_size(SVE_BYTES / 8)));
1162
1163 struct nonpst8
1164 {
1165 tiny_vec a;
1166 };
1167 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst8\n} } } */
1168 SEL2 (struct, nonpst8)
1169
1170 /*
1171 ** test_nonpst8: { target aarch64_little_endian }
1172 ** umov w0, v0\.b\[1\]
1173 ** ret
1174 */
1175 /*
1176 ** test_nonpst8: { target aarch64_big_endian }
1177 ** umov w0, v0\.b\[6\]
1178 ** ret
1179 */
1180 /* { dg-final { scan-assembler-not {\t\.variant_pcs\ttest_nonpst8\n} } } */
1181 unsigned int
1182 test_nonpst8 (struct nonpst8 x)
1183 {
1184 return x.a[1];
1185 }
1186
1187 /*
1188 ** ret_nonpst8:
1189 ** movi v0\.8b, 0x1
1190 ** ret
1191 */
1192 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tret_nonpst8\n} } } */
1193 struct nonpst8
1194 ret_nonpst8 (void)
1195 {
1196 return (struct nonpst8) { { 1, 1, 1, 1, 1, 1, 1, 1 } };
1197 }