1  /* { dg-do compile } */
       2  /* { dg-options "-O -fshrink-wrap -fstack-clash-protection -g" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  
       5  #pragma GCC aarch64 "arm_sve.h"
       6  
       7  /*
       8  ** test_1:
       9  **	str	x24, \[sp, -32\]!
      10  **	cntb	x13
      11  **	mov	x11, sp
      12  **	...
      13  **	sub	sp, sp, x13
      14  **	str	p4, \[sp\]
      15  **	cbz	w0, [^\n]*
      16  **	...
      17  **	ptrue	p0\.b, all
      18  **	ldr	p4, \[sp\]
      19  **	addvl	sp, sp, #1
      20  **	ldr	x24, \[sp\], 32
      21  **	ret
      22  */
      23  svbool_t
      24  test_1 (int n)
      25  {
      26    asm volatile ("" ::: "x24");
      27    if (n)
      28      {
      29        volatile int x = 1;
      30        asm volatile ("" ::: "p4");
      31      }
      32    return svptrue_b8 ();
      33  }
      34  
      35  /*
      36  ** test_2:
      37  **	str	x24, \[sp, -32\]!
      38  **	cntb	x13
      39  **	mov	x11, sp
      40  **	...
      41  **	sub	sp, sp, x13
      42  **	str	p4, \[sp\]
      43  **	cbz	w0, [^\n]*
      44  **	str	p5, \[sp, #1, mul vl\]
      45  **	str	p6, \[sp, #2, mul vl\]
      46  **	...
      47  **	ptrue	p0\.b, all
      48  **	ldr	p4, \[sp\]
      49  **	addvl	sp, sp, #1
      50  **	ldr	x24, \[sp\], 32
      51  **	ret
      52  */
      53  svbool_t
      54  test_2 (int n)
      55  {
      56    asm volatile ("" ::: "x24");
      57    if (n)
      58      {
      59        volatile int x = 1;
      60        asm volatile ("" ::: "p4", "p5", "p6");
      61      }
      62    return svptrue_b8 ();
      63  }