1 /* { dg-do compile } */
2 /* { dg-options "-O -fshrink-wrap -fstack-clash-protection -msve-vector-bits=256 -g" } */
3 /* { dg-final { check-function-bodies "**" "" } } */
4
5 #pragma GCC aarch64 "arm_sve.h"
6
7 svbool_t take_stack_args (volatile void *, void *, int, int, int,
8 int, int, int, int);
9
10 /*
11 ** test_1:
12 ** sub sp, sp, #48
13 ** str z16, \[sp\]
14 ** ...
15 ** ptrue p0\.b, vl32
16 ** ldr z16, \[sp\]
17 ** add sp, sp, #?48
18 ** ret
19 */
20 svbool_t
21 test_1 (void)
22 {
23 volatile int x = 1;
24 asm volatile ("" ::: "z16");
25 return svptrue_b8 ();
26 }
27
28 /*
29 ** test_2:
30 ** sub sp, sp, #80
31 ** stp x24, x25, \[sp, 32\]
32 ** str x26, \[sp, 48\]
33 ** str z16, \[sp\]
34 ** ...
35 ** ptrue p0\.b, vl32
36 ** ldr z16, \[sp\]
37 ** ldp x24, x25, \[sp, 32\]
38 ** ldr x26, \[sp, 48\]
39 ** add sp, sp, #?80
40 ** ret
41 */
42 svbool_t
43 test_2 (void)
44 {
45 volatile int x = 1;
46 asm volatile ("" ::: "z16", "x24", "x25", "x26");
47 return svptrue_b8 ();
48 }
49
50 /*
51 ** test_3:
52 ** mov x12, #?4160
53 ** sub sp, sp, x12
54 ** stp x24, x25, \[sp, 32\]
55 ** str x26, \[sp, 48\]
56 ** str z16, \[sp\]
57 ** ...
58 ** ptrue p0\.b, vl32
59 ** ldr z16, \[sp\]
60 ** ldp x24, x25, \[sp, 32\]
61 ** ldr x26, \[sp, 48\]
62 ** add sp, sp, x12
63 ** ret
64 */
65 svbool_t
66 test_3 (void)
67 {
68 volatile int x[1024];
69 asm volatile ("" :: "r" (x) : "z16", "x24", "x25", "x26");
70 return svptrue_b8 ();
71 }
72
73 /*
74 ** test_4:
75 ** sub sp, sp, #64
76 ** str z16, \[sp\]
77 ** ...
78 ** ptrue p0\.h, vl16
79 ** ldr z16, \[sp\]
80 ** add sp, sp, #?64
81 ** ret
82 */
83 svbool_t
84 test_4 (void)
85 {
86 volatile svint32_t b;
87 b = svdup_s32 (1);
88 asm volatile ("" ::: "z16");
89 return svptrue_b16 ();
90 }
91
92 /*
93 ** test_5:
94 ** sub sp, sp, #96
95 ** stp x24, x25, \[sp, 32\]
96 ** str x26, \[sp, 48\]
97 ** str z16, \[sp\]
98 ** ...
99 ** ptrue p0\.h, vl16
100 ** ldr z16, \[sp\]
101 ** ldp x24, x25, \[sp, 32\]
102 ** ldr x26, \[sp, 48\]
103 ** add sp, sp, #?96
104 ** ret
105 */
106 svbool_t
107 test_5 (void)
108 {
109 volatile svint32_t b;
110 b = svdup_s32 (1);
111 asm volatile ("" ::: "z16", "x24", "x25", "x26");
112 return svptrue_b16 ();
113 }
114
115 /*
116 ** test_6:
117 ** stp x29, x30, \[sp, -16\]!
118 ** mov x29, sp
119 ** sub sp, sp, #32
120 ** str z16, \[sp\]
121 ** ...
122 ** ptrue p0\.b, vl32
123 ** add sp, sp, #?16
124 ** ldr z16, \[sp\]
125 ** add sp, sp, #?32
126 ** ldp x29, x30, \[sp\], 16
127 ** ret
128 */
129 svbool_t
130 test_6 (void)
131 {
132 take_stack_args (0, 0, 1, 2, 3, 4, 5, 6, 7);
133 asm volatile ("" ::: "z16");
134 return svptrue_b8 ();
135 }
136
137 /*
138 ** test_7:
139 ** mov x12, #?4144
140 ** sub sp, sp, x12
141 ** stp x29, x30, \[sp, 32\]
142 ** add x29, sp, #?32
143 ** str z16, \[sp\]
144 ** sub sp, sp, #16
145 ** ...
146 ** ptrue p0\.b, vl32
147 ** add sp, sp, #?16
148 ** ldr z16, \[sp\]
149 ** add sp, sp, #?32
150 ** ldp x29, x30, \[sp\]
151 ** mov x12, #?4112
152 ** add sp, sp, x12
153 ** ret
154 */
155 svbool_t
156 test_7 (void)
157 {
158 volatile int x[1024];
159 take_stack_args (x, 0, 1, 2, 3, 4, 5, 6, 7);
160 asm volatile ("" ::: "z16");
161 return svptrue_b8 ();
162 }
163
164 /*
165 ** test_8:
166 ** mov x12, #?4176
167 ** sub sp, sp, x12
168 ** stp x29, x30, \[sp, 32\]
169 ** add x29, sp, #?32
170 ** stp x24, x25, \[sp, 48\]
171 ** str x26, \[sp, 64\]
172 ** str z16, \[sp\]
173 ** sub sp, sp, #16
174 ** ...
175 ** ptrue p0\.b, vl32
176 ** add sp, sp, #?16
177 ** ldr z16, \[sp\]
178 ** add sp, sp, #?32
179 ** ldp x24, x25, \[sp, 16\]
180 ** ldr x26, \[sp, 32\]
181 ** ldp x29, x30, \[sp\]
182 ** mov x12, #?4144
183 ** add sp, sp, x12
184 ** ret
185 */
186 svbool_t
187 test_8 (void)
188 {
189 volatile int x[1024];
190 take_stack_args (x, 0, 1, 2, 3, 4, 5, 6, 7);
191 asm volatile ("" ::: "z16", "x24", "x25", "x26");
192 return svptrue_b8 ();
193 }
194
195 /*
196 ** test_9:
197 ** mov x12, #?4144
198 ** sub sp, sp, x12
199 ** stp x29, x30, \[sp, 32\]
200 ** add x29, sp, #?32
201 ** str z16, \[sp\]
202 ** sub sp, sp, #16
203 ** ...
204 ** ptrue p0\.b, vl32
205 ** sub sp, x29, #32
206 ** ldr z16, \[sp\]
207 ** add sp, sp, #?32
208 ** ldp x29, x30, \[sp\]
209 ** mov x12, #?4112
210 ** add sp, sp, x12
211 ** ret
212 */
213 svbool_t
214 test_9 (int n)
215 {
216 volatile int x[1024];
217 take_stack_args (x, __builtin_alloca (n), 1, 2, 3, 4, 5, 6, 7);
218 asm volatile ("" ::: "z16");
219 return svptrue_b8 ();
220 }
221
222 /*
223 ** test_10:
224 ** mov x12, #?4176
225 ** sub sp, sp, x12
226 ** stp x29, x30, \[sp, 32\]
227 ** add x29, sp, #?32
228 ** stp x24, x25, \[sp, 48\]
229 ** str x26, \[sp, 64\]
230 ** str z16, \[sp\]
231 ** sub sp, sp, #16
232 ** ...
233 ** ptrue p0\.b, vl32
234 ** sub sp, x29, #32
235 ** ldr z16, \[sp\]
236 ** add sp, sp, #?32
237 ** ldp x24, x25, \[sp, 16\]
238 ** ldr x26, \[sp, 32\]
239 ** ldp x29, x30, \[sp\]
240 ** mov x12, #?4144
241 ** add sp, sp, x12
242 ** ret
243 */
244 svbool_t
245 test_10 (int n)
246 {
247 volatile int x[1024];
248 take_stack_args (x, __builtin_alloca (n), 1, 2, 3, 4, 5, 6, 7);
249 asm volatile ("" ::: "z16", "x24", "x25", "x26");
250 return svptrue_b8 ();
251 }
252
253 /*
254 ** test_11:
255 ** sub sp, sp, #65536
256 ** str xzr, \[sp, 1024\]
257 ** mov x12, #?64480
258 ** sub sp, sp, x12
259 ** stp x29, x30, \[sp, 32\]
260 ** add x29, sp, #?32
261 ** stp x24, x25, \[sp, 48\]
262 ** str x26, \[sp, 64\]
263 ** str z16, \[sp\]
264 ** sub sp, sp, #16
265 ** ...
266 ** ptrue p0\.b, vl32
267 ** sub sp, x29, #32
268 ** ldr z16, \[sp\]
269 ** add sp, sp, #?32
270 ** ldp x24, x25, \[sp, 16\]
271 ** ldr x26, \[sp, 32\]
272 ** ldp x29, x30, \[sp\]
273 ** add sp, sp, #?3008
274 ** add sp, sp, #?126976
275 ** ret
276 */
277 svbool_t
278 test_11 (int n)
279 {
280 volatile int x[0x7ee4];
281 take_stack_args (x, __builtin_alloca (n), 1, 2, 3, 4, 5, 6, 7);
282 asm volatile ("" ::: "z16", "x24", "x25", "x26");
283 return svptrue_b8 ();
284 }