1 /* { dg-do compile } */
2 /* { dg-options "-O -mlittle-endian -fshrink-wrap -fstack-clash-protection -g" } */
3 /* { dg-final { check-function-bodies "**" "" } } */
4
5 #pragma GCC aarch64 "arm_sve.h"
6
7 /*
8 ** test_1:
9 ** cntd x12, all, mul #9
10 ** lsl x12, x12, #?4
11 ** mov x11, sp
12 ** ...
13 ** sub sp, sp, x12
14 ** str p4, \[sp\]
15 ** str p5, \[sp, #1, mul vl\]
16 ** str p6, \[sp, #2, mul vl\]
17 ** str p7, \[sp, #3, mul vl\]
18 ** str p8, \[sp, #4, mul vl\]
19 ** str p9, \[sp, #5, mul vl\]
20 ** str p10, \[sp, #6, mul vl\]
21 ** str p11, \[sp, #7, mul vl\]
22 ** str p12, \[sp, #8, mul vl\]
23 ** str p13, \[sp, #9, mul vl\]
24 ** str p14, \[sp, #10, mul vl\]
25 ** str p15, \[sp, #11, mul vl\]
26 ** str z8, \[sp, #2, mul vl\]
27 ** str z9, \[sp, #3, mul vl\]
28 ** str z10, \[sp, #4, mul vl\]
29 ** str z11, \[sp, #5, mul vl\]
30 ** str z12, \[sp, #6, mul vl\]
31 ** str z13, \[sp, #7, mul vl\]
32 ** str z14, \[sp, #8, mul vl\]
33 ** str z15, \[sp, #9, mul vl\]
34 ** str z16, \[sp, #10, mul vl\]
35 ** str z17, \[sp, #11, mul vl\]
36 ** str z18, \[sp, #12, mul vl\]
37 ** str z19, \[sp, #13, mul vl\]
38 ** str z20, \[sp, #14, mul vl\]
39 ** str z21, \[sp, #15, mul vl\]
40 ** str z22, \[sp, #16, mul vl\]
41 ** str z23, \[sp, #17, mul vl\]
42 ** ptrue p0\.b, all
43 ** ldr z8, \[sp, #2, mul vl\]
44 ** ldr z9, \[sp, #3, mul vl\]
45 ** ldr z10, \[sp, #4, mul vl\]
46 ** ldr z11, \[sp, #5, mul vl\]
47 ** ldr z12, \[sp, #6, mul vl\]
48 ** ldr z13, \[sp, #7, mul vl\]
49 ** ldr z14, \[sp, #8, mul vl\]
50 ** ldr z15, \[sp, #9, mul vl\]
51 ** ldr z16, \[sp, #10, mul vl\]
52 ** ldr z17, \[sp, #11, mul vl\]
53 ** ldr z18, \[sp, #12, mul vl\]
54 ** ldr z19, \[sp, #13, mul vl\]
55 ** ldr z20, \[sp, #14, mul vl\]
56 ** ldr z21, \[sp, #15, mul vl\]
57 ** ldr z22, \[sp, #16, mul vl\]
58 ** ldr z23, \[sp, #17, mul vl\]
59 ** ldr p4, \[sp\]
60 ** ldr p5, \[sp, #1, mul vl\]
61 ** ldr p6, \[sp, #2, mul vl\]
62 ** ldr p7, \[sp, #3, mul vl\]
63 ** ldr p8, \[sp, #4, mul vl\]
64 ** ldr p9, \[sp, #5, mul vl\]
65 ** ldr p10, \[sp, #6, mul vl\]
66 ** ldr p11, \[sp, #7, mul vl\]
67 ** ldr p12, \[sp, #8, mul vl\]
68 ** ldr p13, \[sp, #9, mul vl\]
69 ** ldr p14, \[sp, #10, mul vl\]
70 ** ldr p15, \[sp, #11, mul vl\]
71 ** addvl sp, sp, #18
72 ** ret
73 */
74 svbool_t
75 test_1 (void)
76 {
77 asm volatile ("" :::
78 "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7",
79 "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15",
80 "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23",
81 "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31",
82 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
83 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15");
84 return svptrue_b8 ();
85 }
86
87 /*
88 ** test_2:
89 ** ptrue p0\.b, all
90 ** ret
91 */
92 svbool_t
93 test_2 (void)
94 {
95 asm volatile ("" :::
96 "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7",
97 "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31",
98 "p0", "p1", "p2", "p3");
99 return svptrue_b8 ();
100 }
101
102 /*
103 ** test_3:
104 ** cntb x12, all, mul #6
105 ** mov x11, sp
106 ** ...
107 ** sub sp, sp, x12
108 ** str p5, \[sp\]
109 ** str p6, \[sp, #1, mul vl\]
110 ** str p11, \[sp, #2, mul vl\]
111 ** str z8, \[sp, #1, mul vl\]
112 ** str z13, \[sp, #2, mul vl\]
113 ** str z19, \[sp, #3, mul vl\]
114 ** str z20, \[sp, #4, mul vl\]
115 ** str z22, \[sp, #5, mul vl\]
116 ** ptrue p0\.b, all
117 ** ldr z8, \[sp, #1, mul vl\]
118 ** ldr z13, \[sp, #2, mul vl\]
119 ** ldr z19, \[sp, #3, mul vl\]
120 ** ldr z20, \[sp, #4, mul vl\]
121 ** ldr z22, \[sp, #5, mul vl\]
122 ** ldr p5, \[sp\]
123 ** ldr p6, \[sp, #1, mul vl\]
124 ** ldr p11, \[sp, #2, mul vl\]
125 ** addvl sp, sp, #6
126 ** ret
127 */
128 svbool_t
129 test_3 (void)
130 {
131 asm volatile ("" :::
132 "z8", "z13", "z19", "z20", "z22",
133 "p5", "p6", "p11");
134 return svptrue_b8 ();
135 }
136
137 /*
138 ** test_4:
139 ** cntb x12
140 ** mov x11, sp
141 ** ...
142 ** sub sp, sp, x12
143 ** str p4, \[sp\]
144 ** ptrue p0\.b, all
145 ** ldr p4, \[sp\]
146 ** addvl sp, sp, #1
147 ** ret
148 */
149 svbool_t
150 test_4 (void)
151 {
152 asm volatile ("" ::: "p4");
153 return svptrue_b8 ();
154 }
155
156 /*
157 ** test_5:
158 ** cntb x12
159 ** mov x11, sp
160 ** ...
161 ** sub sp, sp, x12
162 ** str z15, \[sp\]
163 ** ptrue p0\.b, all
164 ** ldr z15, \[sp\]
165 ** addvl sp, sp, #1
166 ** ret
167 */
168 svbool_t
169 test_5 (void)
170 {
171 asm volatile ("" ::: "z15");
172 return svptrue_b8 ();
173 }
174
175 /*
176 ** test_6:
177 ** cntb x12
178 ** mov x11, sp
179 ** ...
180 ** sub sp, sp, x12
181 ** str z15, \[sp\]
182 ** mov z0\.b, #1
183 ** ldr z15, \[sp\]
184 ** addvl sp, sp, #1
185 ** ret
186 */
187 svint8_t
188 test_6 (svbool_t p0, svbool_t p1, svbool_t p2, svbool_t p3)
189 {
190 asm volatile ("" :: "Upa" (p0), "Upa" (p1), "Upa" (p2), "Upa" (p3) : "z15");
191 return svdup_s8 (1);
192 }
193
194 /*
195 ** test_7:
196 ** cntb x12
197 ** mov x11, sp
198 ** ...
199 ** sub sp, sp, x12
200 ** str z16, \[sp\]
201 ** ptrue p0\.b, all
202 ** ldr z16, \[sp\]
203 ** addvl sp, sp, #1
204 ** ret
205 */
206 svbool_t
207 test_7 (void)
208 {
209 asm volatile ("" ::: "z16");
210 return svptrue_b8 ();
211 }