1 /* { dg-do compile } */
2 /* { dg-options "-O -mbig-endian -fshrink-wrap -fno-stack-clash-protection -g" } */
3 /* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
4
5 void standard_callee (void);
6 __attribute__((aarch64_vector_pcs)) void vpcs_callee (void);
7
8 /*
9 ** calls_standard:
10 ** stp x29, x30, \[sp, -16\]!
11 ** mov x29, sp
12 ** addvl sp, sp, #-18
13 ** str p4, \[sp\]
14 ** str p5, \[sp, #1, mul vl\]
15 ** str p6, \[sp, #2, mul vl\]
16 ** str p7, \[sp, #3, mul vl\]
17 ** str p8, \[sp, #4, mul vl\]
18 ** str p9, \[sp, #5, mul vl\]
19 ** str p10, \[sp, #6, mul vl\]
20 ** str p11, \[sp, #7, mul vl\]
21 ** str p12, \[sp, #8, mul vl\]
22 ** str p13, \[sp, #9, mul vl\]
23 ** str p14, \[sp, #10, mul vl\]
24 ** str p15, \[sp, #11, mul vl\]
25 ** ptrue p0\.b, all
26 ** st1d z8\.d, p0, \[sp, #2, mul vl\]
27 ** st1d z9\.d, p0, \[sp, #3, mul vl\]
28 ** st1d z10\.d, p0, \[sp, #4, mul vl\]
29 ** st1d z11\.d, p0, \[sp, #5, mul vl\]
30 ** st1d z12\.d, p0, \[sp, #6, mul vl\]
31 ** st1d z13\.d, p0, \[sp, #7, mul vl\]
32 ** addvl x11, sp, #16
33 ** st1d z14\.d, p0, \[x11, #-8, mul vl\]
34 ** st1d z15\.d, p0, \[x11, #-7, mul vl\]
35 ** str z16, \[sp, #10, mul vl\]
36 ** str z17, \[sp, #11, mul vl\]
37 ** str z18, \[sp, #12, mul vl\]
38 ** str z19, \[sp, #13, mul vl\]
39 ** str z20, \[sp, #14, mul vl\]
40 ** str z21, \[sp, #15, mul vl\]
41 ** str z22, \[sp, #16, mul vl\]
42 ** str z23, \[sp, #17, mul vl\]
43 ** bl standard_callee
44 ** ptrue p0\.b, all
45 ** ld1d z8\.d, p0/z, \[sp, #2, mul vl\]
46 ** ld1d z9\.d, p0/z, \[sp, #3, mul vl\]
47 ** ld1d z10\.d, p0/z, \[sp, #4, mul vl\]
48 ** ld1d z11\.d, p0/z, \[sp, #5, mul vl\]
49 ** ld1d z12\.d, p0/z, \[sp, #6, mul vl\]
50 ** ld1d z13\.d, p0/z, \[sp, #7, mul vl\]
51 ** addvl x11, sp, #16
52 ** ld1d z14\.d, p0/z, \[x11, #-8, mul vl\]
53 ** ld1d z15\.d, p0/z, \[x11, #-7, mul vl\]
54 ** ldr z16, \[sp, #10, mul vl\]
55 ** ldr z17, \[sp, #11, mul vl\]
56 ** ldr z18, \[sp, #12, mul vl\]
57 ** ldr z19, \[sp, #13, mul vl\]
58 ** ldr z20, \[sp, #14, mul vl\]
59 ** ldr z21, \[sp, #15, mul vl\]
60 ** ldr z22, \[sp, #16, mul vl\]
61 ** ldr z23, \[sp, #17, mul vl\]
62 ** ldr p4, \[sp\]
63 ** ldr p5, \[sp, #1, mul vl\]
64 ** ldr p6, \[sp, #2, mul vl\]
65 ** ldr p7, \[sp, #3, mul vl\]
66 ** ldr p8, \[sp, #4, mul vl\]
67 ** ldr p9, \[sp, #5, mul vl\]
68 ** ldr p10, \[sp, #6, mul vl\]
69 ** ldr p11, \[sp, #7, mul vl\]
70 ** ldr p12, \[sp, #8, mul vl\]
71 ** ldr p13, \[sp, #9, mul vl\]
72 ** ldr p14, \[sp, #10, mul vl\]
73 ** ldr p15, \[sp, #11, mul vl\]
74 ** addvl sp, sp, #18
75 ** ldp x29, x30, \[sp\], 16
76 ** ret
77 */
78 void calls_standard (__SVInt8_t x) { standard_callee (); }
79
80 /*
81 ** calls_vpcs:
82 ** stp x29, x30, \[sp, -16\]!
83 ** mov x29, sp
84 ** addvl sp, sp, #-18
85 ** str p4, \[sp\]
86 ** str p5, \[sp, #1, mul vl\]
87 ** str p6, \[sp, #2, mul vl\]
88 ** str p7, \[sp, #3, mul vl\]
89 ** str p8, \[sp, #4, mul vl\]
90 ** str p9, \[sp, #5, mul vl\]
91 ** str p10, \[sp, #6, mul vl\]
92 ** str p11, \[sp, #7, mul vl\]
93 ** str p12, \[sp, #8, mul vl\]
94 ** str p13, \[sp, #9, mul vl\]
95 ** str p14, \[sp, #10, mul vl\]
96 ** str p15, \[sp, #11, mul vl\]
97 ** ptrue p0\.b, all
98 ** st1d z8\.d, p0, \[sp, #2, mul vl\]
99 ** st1d z9\.d, p0, \[sp, #3, mul vl\]
100 ** st1d z10\.d, p0, \[sp, #4, mul vl\]
101 ** st1d z11\.d, p0, \[sp, #5, mul vl\]
102 ** st1d z12\.d, p0, \[sp, #6, mul vl\]
103 ** st1d z13\.d, p0, \[sp, #7, mul vl\]
104 ** addvl x11, sp, #16
105 ** st1d z14\.d, p0, \[x11, #-8, mul vl\]
106 ** st1d z15\.d, p0, \[x11, #-7, mul vl\]
107 ** str z16, \[sp, #10, mul vl\]
108 ** str z17, \[sp, #11, mul vl\]
109 ** str z18, \[sp, #12, mul vl\]
110 ** str z19, \[sp, #13, mul vl\]
111 ** str z20, \[sp, #14, mul vl\]
112 ** str z21, \[sp, #15, mul vl\]
113 ** str z22, \[sp, #16, mul vl\]
114 ** str z23, \[sp, #17, mul vl\]
115 ** bl vpcs_callee
116 ** ptrue p0\.b, all
117 ** ld1d z8\.d, p0/z, \[sp, #2, mul vl\]
118 ** ld1d z9\.d, p0/z, \[sp, #3, mul vl\]
119 ** ld1d z10\.d, p0/z, \[sp, #4, mul vl\]
120 ** ld1d z11\.d, p0/z, \[sp, #5, mul vl\]
121 ** ld1d z12\.d, p0/z, \[sp, #6, mul vl\]
122 ** ld1d z13\.d, p0/z, \[sp, #7, mul vl\]
123 ** addvl x11, sp, #16
124 ** ld1d z14\.d, p0/z, \[x11, #-8, mul vl\]
125 ** ld1d z15\.d, p0/z, \[x11, #-7, mul vl\]
126 ** ldr z16, \[sp, #10, mul vl\]
127 ** ldr z17, \[sp, #11, mul vl\]
128 ** ldr z18, \[sp, #12, mul vl\]
129 ** ldr z19, \[sp, #13, mul vl\]
130 ** ldr z20, \[sp, #14, mul vl\]
131 ** ldr z21, \[sp, #15, mul vl\]
132 ** ldr z22, \[sp, #16, mul vl\]
133 ** ldr z23, \[sp, #17, mul vl\]
134 ** ldr p4, \[sp\]
135 ** ldr p5, \[sp, #1, mul vl\]
136 ** ldr p6, \[sp, #2, mul vl\]
137 ** ldr p7, \[sp, #3, mul vl\]
138 ** ldr p8, \[sp, #4, mul vl\]
139 ** ldr p9, \[sp, #5, mul vl\]
140 ** ldr p10, \[sp, #6, mul vl\]
141 ** ldr p11, \[sp, #7, mul vl\]
142 ** ldr p12, \[sp, #8, mul vl\]
143 ** ldr p13, \[sp, #9, mul vl\]
144 ** ldr p14, \[sp, #10, mul vl\]
145 ** ldr p15, \[sp, #11, mul vl\]
146 ** addvl sp, sp, #18
147 ** ldp x29, x30, \[sp\], 16
148 ** ret
149 */
150 void calls_vpcs (__SVInt8_t x) { vpcs_callee (); }
151
152 /*
153 ** calls_standard_ptr:
154 ** stp x29, x30, \[sp, -16\]!
155 ** mov x29, sp
156 ** addvl sp, sp, #-18
157 ** str p4, \[sp\]
158 ** str p5, \[sp, #1, mul vl\]
159 ** str p6, \[sp, #2, mul vl\]
160 ** str p7, \[sp, #3, mul vl\]
161 ** str p8, \[sp, #4, mul vl\]
162 ** str p9, \[sp, #5, mul vl\]
163 ** str p10, \[sp, #6, mul vl\]
164 ** str p11, \[sp, #7, mul vl\]
165 ** str p12, \[sp, #8, mul vl\]
166 ** str p13, \[sp, #9, mul vl\]
167 ** str p14, \[sp, #10, mul vl\]
168 ** str p15, \[sp, #11, mul vl\]
169 ** ptrue p0\.b, all
170 ** st1d z8\.d, p0, \[sp, #2, mul vl\]
171 ** st1d z9\.d, p0, \[sp, #3, mul vl\]
172 ** st1d z10\.d, p0, \[sp, #4, mul vl\]
173 ** st1d z11\.d, p0, \[sp, #5, mul vl\]
174 ** st1d z12\.d, p0, \[sp, #6, mul vl\]
175 ** st1d z13\.d, p0, \[sp, #7, mul vl\]
176 ** addvl x11, sp, #16
177 ** st1d z14\.d, p0, \[x11, #-8, mul vl\]
178 ** st1d z15\.d, p0, \[x11, #-7, mul vl\]
179 ** str z16, \[sp, #10, mul vl\]
180 ** str z17, \[sp, #11, mul vl\]
181 ** str z18, \[sp, #12, mul vl\]
182 ** str z19, \[sp, #13, mul vl\]
183 ** str z20, \[sp, #14, mul vl\]
184 ** str z21, \[sp, #15, mul vl\]
185 ** str z22, \[sp, #16, mul vl\]
186 ** str z23, \[sp, #17, mul vl\]
187 ** blr x0
188 ** ptrue p0\.b, all
189 ** ld1d z8\.d, p0/z, \[sp, #2, mul vl\]
190 ** ld1d z9\.d, p0/z, \[sp, #3, mul vl\]
191 ** ld1d z10\.d, p0/z, \[sp, #4, mul vl\]
192 ** ld1d z11\.d, p0/z, \[sp, #5, mul vl\]
193 ** ld1d z12\.d, p0/z, \[sp, #6, mul vl\]
194 ** ld1d z13\.d, p0/z, \[sp, #7, mul vl\]
195 ** addvl x11, sp, #16
196 ** ld1d z14\.d, p0/z, \[x11, #-8, mul vl\]
197 ** ld1d z15\.d, p0/z, \[x11, #-7, mul vl\]
198 ** ldr z16, \[sp, #10, mul vl\]
199 ** ldr z17, \[sp, #11, mul vl\]
200 ** ldr z18, \[sp, #12, mul vl\]
201 ** ldr z19, \[sp, #13, mul vl\]
202 ** ldr z20, \[sp, #14, mul vl\]
203 ** ldr z21, \[sp, #15, mul vl\]
204 ** ldr z22, \[sp, #16, mul vl\]
205 ** ldr z23, \[sp, #17, mul vl\]
206 ** ldr p4, \[sp\]
207 ** ldr p5, \[sp, #1, mul vl\]
208 ** ldr p6, \[sp, #2, mul vl\]
209 ** ldr p7, \[sp, #3, mul vl\]
210 ** ldr p8, \[sp, #4, mul vl\]
211 ** ldr p9, \[sp, #5, mul vl\]
212 ** ldr p10, \[sp, #6, mul vl\]
213 ** ldr p11, \[sp, #7, mul vl\]
214 ** ldr p12, \[sp, #8, mul vl\]
215 ** ldr p13, \[sp, #9, mul vl\]
216 ** ldr p14, \[sp, #10, mul vl\]
217 ** ldr p15, \[sp, #11, mul vl\]
218 ** addvl sp, sp, #18
219 ** ldp x29, x30, \[sp\], 16
220 ** ret
221 */
222 void
223 calls_standard_ptr (__SVInt8_t x, void (*fn) (void))
224 {
225 fn ();
226 }
227
228 /*
229 ** calls_vpcs_ptr:
230 ** stp x29, x30, \[sp, -16\]!
231 ** mov x29, sp
232 ** addvl sp, sp, #-18
233 ** str p4, \[sp\]
234 ** str p5, \[sp, #1, mul vl\]
235 ** str p6, \[sp, #2, mul vl\]
236 ** str p7, \[sp, #3, mul vl\]
237 ** str p8, \[sp, #4, mul vl\]
238 ** str p9, \[sp, #5, mul vl\]
239 ** str p10, \[sp, #6, mul vl\]
240 ** str p11, \[sp, #7, mul vl\]
241 ** str p12, \[sp, #8, mul vl\]
242 ** str p13, \[sp, #9, mul vl\]
243 ** str p14, \[sp, #10, mul vl\]
244 ** str p15, \[sp, #11, mul vl\]
245 ** ptrue p0\.b, all
246 ** st1d z8\.d, p0, \[sp, #2, mul vl\]
247 ** st1d z9\.d, p0, \[sp, #3, mul vl\]
248 ** st1d z10\.d, p0, \[sp, #4, mul vl\]
249 ** st1d z11\.d, p0, \[sp, #5, mul vl\]
250 ** st1d z12\.d, p0, \[sp, #6, mul vl\]
251 ** st1d z13\.d, p0, \[sp, #7, mul vl\]
252 ** addvl x11, sp, #16
253 ** st1d z14\.d, p0, \[x11, #-8, mul vl\]
254 ** st1d z15\.d, p0, \[x11, #-7, mul vl\]
255 ** str z16, \[sp, #10, mul vl\]
256 ** str z17, \[sp, #11, mul vl\]
257 ** str z18, \[sp, #12, mul vl\]
258 ** str z19, \[sp, #13, mul vl\]
259 ** str z20, \[sp, #14, mul vl\]
260 ** str z21, \[sp, #15, mul vl\]
261 ** str z22, \[sp, #16, mul vl\]
262 ** str z23, \[sp, #17, mul vl\]
263 ** blr x0
264 ** ptrue p0\.b, all
265 ** ld1d z8\.d, p0/z, \[sp, #2, mul vl\]
266 ** ld1d z9\.d, p0/z, \[sp, #3, mul vl\]
267 ** ld1d z10\.d, p0/z, \[sp, #4, mul vl\]
268 ** ld1d z11\.d, p0/z, \[sp, #5, mul vl\]
269 ** ld1d z12\.d, p0/z, \[sp, #6, mul vl\]
270 ** ld1d z13\.d, p0/z, \[sp, #7, mul vl\]
271 ** addvl x11, sp, #16
272 ** ld1d z14\.d, p0/z, \[x11, #-8, mul vl\]
273 ** ld1d z15\.d, p0/z, \[x11, #-7, mul vl\]
274 ** ldr z16, \[sp, #10, mul vl\]
275 ** ldr z17, \[sp, #11, mul vl\]
276 ** ldr z18, \[sp, #12, mul vl\]
277 ** ldr z19, \[sp, #13, mul vl\]
278 ** ldr z20, \[sp, #14, mul vl\]
279 ** ldr z21, \[sp, #15, mul vl\]
280 ** ldr z22, \[sp, #16, mul vl\]
281 ** ldr z23, \[sp, #17, mul vl\]
282 ** ldr p4, \[sp\]
283 ** ldr p5, \[sp, #1, mul vl\]
284 ** ldr p6, \[sp, #2, mul vl\]
285 ** ldr p7, \[sp, #3, mul vl\]
286 ** ldr p8, \[sp, #4, mul vl\]
287 ** ldr p9, \[sp, #5, mul vl\]
288 ** ldr p10, \[sp, #6, mul vl\]
289 ** ldr p11, \[sp, #7, mul vl\]
290 ** ldr p12, \[sp, #8, mul vl\]
291 ** ldr p13, \[sp, #9, mul vl\]
292 ** ldr p14, \[sp, #10, mul vl\]
293 ** ldr p15, \[sp, #11, mul vl\]
294 ** addvl sp, sp, #18
295 ** ldp x29, x30, \[sp\], 16
296 ** ret
297 */
298 void
299 calls_vpcs_ptr (__SVInt8_t x,
300 void (*__attribute__((aarch64_vector_pcs)) fn) (void))
301 {
302 fn ();
303 }