1  /* { dg-do compile } */
       2  /* { dg-options "-O -fno-stack-clash-protection -g" } */
       3  /* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */
       4  
       5  #include <arm_sve.h>
       6  
       7  /*
       8  ** callee_int:
       9  **	ptrue	p3\.b, all
      10  **	ld1b	(z(?:2[4-9]|3[0-1]).b), p3/z, \[x4\]
      11  **	st1b	\1, p2, \[x0\]
      12  **	st1b	z4\.b, p1, \[x0\]
      13  **	st1h	z5\.h, p1, \[x1\]
      14  **	st1w	z6\.s, p1, \[x2\]
      15  **	st1d	z7\.d, p1, \[x3\]
      16  **	st1b	z0\.b, p0, \[x0\]
      17  **	st1h	z1\.h, p0, \[x1\]
      18  **	st1w	z2\.s, p0, \[x2\]
      19  **	st1d	z3\.d, p0, \[x3\]
      20  **	ret
      21  */
      22  void __attribute__((noipa))
      23  callee_int (int8_t *x0, int16_t *x1, int32_t *x2, int64_t *x3,
      24  	    svint8_t z0, svint16_t z1, svint32_t z2, svint64_t z3,
      25  	    svint8_t z4, svint16_t z5, svint32_t z6, svint64_t z7,
      26  	    svint8_t z8,
      27  	    svbool_t p0, svbool_t p1, svbool_t p2)
      28  {
      29    svst1 (p2, x0, z8);
      30    svst1 (p1, x0, z4);
      31    svst1 (p1, x1, z5);
      32    svst1 (p1, x2, z6);
      33    svst1 (p1, x3, z7);
      34    svst1 (p0, x0, z0);
      35    svst1 (p0, x1, z1);
      36    svst1 (p0, x2, z2);
      37    svst1 (p0, x3, z3);
      38  }
      39  
      40  void __attribute__((noipa))
      41  caller_int (int8_t *x0, int16_t *x1, int32_t *x2, int64_t *x3)
      42  {
      43    callee_int (x0, x1, x2, x3,
      44  	      svdup_s8 (0),
      45  	      svdup_s16 (1),
      46  	      svdup_s32 (2),
      47  	      svdup_s64 (3),
      48  	      svdup_s8 (4),
      49  	      svdup_s16 (5),
      50  	      svdup_s32 (6),
      51  	      svdup_s64 (7),
      52  	      svdup_s8 (8),
      53  	      svptrue_pat_b8 (SV_VL1),
      54  	      svptrue_pat_b16 (SV_VL2),
      55  	      svptrue_pat_b32 (SV_VL3));
      56  }
      57  
      58  /* { dg-final { scan-assembler {\tmov\tz0\.b, #0\n} } } */
      59  /* { dg-final { scan-assembler {\tmov\tz1\.h, #1\n} } } */
      60  /* { dg-final { scan-assembler {\tmov\tz2\.s, #2\n} } } */
      61  /* { dg-final { scan-assembler {\tmov\tz3\.d, #3\n} } } */
      62  /* { dg-final { scan-assembler {\tmov\tz4\.b, #4\n} } } */
      63  /* { dg-final { scan-assembler {\tmov\tz5\.h, #5\n} } } */
      64  /* { dg-final { scan-assembler {\tmov\tz6\.s, #6\n} } } */
      65  /* { dg-final { scan-assembler {\tmov\tz7\.d, #7\n} } } */
      66  /* { dg-final { scan-assembler {\tmov\tx4, sp\n} } } */
      67  /* { dg-final { scan-assembler {\tmov\t(z[0-9]+\.b), #8\n.*\tst1b\t\1, p[0-7], \[x4\]\n} } } */
      68  /* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
      69  /* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
      70  /* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */