1  /* { dg-do compile } */
       2  
       3  #include <arm_sve.h>
       4  
       5  svbool_t ret_b (void) { return svptrue_b8 (); }
       6  
       7  svint8_t ret_s8 (void) { return svdup_s8 (0); }
       8  svint16_t ret_s16 (void) { return svdup_s16 (0); }
       9  svint32_t ret_s32 (void) { return svdup_s32 (0); }
      10  svint64_t ret_s64 (void) { return svdup_s64 (0); }
      11  svuint8_t ret_u8 (void) { return svdup_u8 (0); }
      12  svuint16_t ret_u16 (void) { return svdup_u16 (0); }
      13  svuint32_t ret_u32 (void) { return svdup_u32 (0); }
      14  svuint64_t ret_u64 (void) { return svdup_u64 (0); }
      15  svbfloat16_t ret_bf16 (void) { return svundef_bf16 (); }
      16  svfloat16_t ret_f16 (void) { return svdup_f16 (0); }
      17  svfloat32_t ret_f32 (void) { return svdup_f32 (0); }
      18  svfloat64_t ret_f64 (void) { return svdup_f64 (0); }
      19  
      20  svint8x2_t ret_s8x2 (void) { return svundef2_s8 (); }
      21  svint16x2_t ret_s16x2 (void) { return svundef2_s16 (); }
      22  svint32x2_t ret_s32x2 (void) { return svundef2_s32 (); }
      23  svint64x2_t ret_s64x2 (void) { return svundef2_s64 (); }
      24  svuint8x2_t ret_u8x2 (void) { return svundef2_u8 (); }
      25  svuint16x2_t ret_u16x2 (void) { return svundef2_u16 (); }
      26  svuint32x2_t ret_u32x2 (void) { return svundef2_u32 (); }
      27  svuint64x2_t ret_u64x2 (void) { return svundef2_u64 (); }
      28  svbfloat16x2_t ret_bf16x2 (void) { return svundef2_bf16 (); }
      29  svfloat16x2_t ret_f16x2 (void) { return svundef2_f16 (); }
      30  svfloat32x2_t ret_f32x2 (void) { return svundef2_f32 (); }
      31  svfloat64x2_t ret_f64x2 (void) { return svundef2_f64 (); }
      32  
      33  svint8x3_t ret_s8x3 (void) { return svundef3_s8 (); }
      34  svint16x3_t ret_s16x3 (void) { return svundef3_s16 (); }
      35  svint32x3_t ret_s32x3 (void) { return svundef3_s32 (); }
      36  svint64x3_t ret_s64x3 (void) { return svundef3_s64 (); }
      37  svuint8x3_t ret_u8x3 (void) { return svundef3_u8 (); }
      38  svuint16x3_t ret_u16x3 (void) { return svundef3_u16 (); }
      39  svuint32x3_t ret_u32x3 (void) { return svundef3_u32 (); }
      40  svuint64x3_t ret_u64x3 (void) { return svundef3_u64 (); }
      41  svbfloat16x3_t ret_bf16x3 (void) { return svundef3_bf16 (); }
      42  svfloat16x3_t ret_f16x3 (void) { return svundef3_f16 (); }
      43  svfloat32x3_t ret_f32x3 (void) { return svundef3_f32 (); }
      44  svfloat64x3_t ret_f64x3 (void) { return svundef3_f64 (); }
      45  
      46  svint8x4_t ret_s8x4 (void) { return svundef4_s8 (); }
      47  svint16x4_t ret_s16x4 (void) { return svundef4_s16 (); }
      48  svint32x4_t ret_s32x4 (void) { return svundef4_s32 (); }
      49  svint64x4_t ret_s64x4 (void) { return svundef4_s64 (); }
      50  svuint8x4_t ret_u8x4 (void) { return svundef4_u8 (); }
      51  svuint16x4_t ret_u16x4 (void) { return svundef4_u16 (); }
      52  svuint32x4_t ret_u32x4 (void) { return svundef4_u32 (); }
      53  svuint64x4_t ret_u64x4 (void) { return svundef4_u64 (); }
      54  svbfloat16x4_t ret_bf16x4 (void) { return svundef4_bf16 (); }
      55  svfloat16x4_t ret_f16x4 (void) { return svundef4_f16 (); }
      56  svfloat32x4_t ret_f32x4 (void) { return svundef4_f32 (); }
      57  svfloat64x4_t ret_f64x4 (void) { return svundef4_f64 (); }
      58  
      59  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_b\n} } } */
      60  
      61  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s8\n} } } */
      62  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s16\n} } } */
      63  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s32\n} } } */
      64  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s64\n} } } */
      65  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u8\n} } } */
      66  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u16\n} } } */
      67  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u32\n} } } */
      68  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u64\n} } } */
      69  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_bf16\n} } } */
      70  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f16\n} } } */
      71  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f32\n} } } */
      72  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f64\n} } } */
      73  
      74  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s8x2\n} } } */
      75  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s16x2\n} } } */
      76  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s32x2\n} } } */
      77  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s64x2\n} } } */
      78  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u8x2\n} } } */
      79  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u16x2\n} } } */
      80  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u32x2\n} } } */
      81  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u64x2\n} } } */
      82  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_bf16x2\n} } } */
      83  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f16x2\n} } } */
      84  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f32x2\n} } } */
      85  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f64x2\n} } } */
      86  
      87  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s8x3\n} } } */
      88  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s16x3\n} } } */
      89  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s16x3\n} } } */
      90  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s32x3\n} } } */
      91  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s64x3\n} } } */
      92  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u8x3\n} } } */
      93  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u16x3\n} } } */
      94  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u32x3\n} } } */
      95  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u64x3\n} } } */
      96  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_bf16x3\n} } } */
      97  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f16x3\n} } } */
      98  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f32x3\n} } } */
      99  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f64x3\n} } } */
     100  
     101  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s8x4\n} } } */
     102  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s16x4\n} } } */
     103  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s32x4\n} } } */
     104  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_s64x4\n} } } */
     105  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u8x4\n} } } */
     106  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u16x4\n} } } */
     107  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u32x4\n} } } */
     108  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_u64x4\n} } } */
     109  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_bf16x4\n} } } */
     110  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f16x4\n} } } */
     111  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f32x4\n} } } */
     112  /* { dg-final { scan-assembler {\t\.variant_pcs\tret_f64x4\n} } } */