1  /* { dg-do assemble { target aarch64_asm_sve_ok } } */
       2  /* { dg-options "-O -msve-vector-bits=2048 -save-temps" } */
       3  
       4  #include <stdint.h>
       5  
       6  #define TEST_OP_IMM(TYPE, OP, NAME, AMT) \
       7    TYPE test##_##TYPE##_##NAME (TYPE a) { return a * AMT; }
       8  
       9  #define TEST_OP(TYPE, MINV, MAXV) \
      10    TYPE test##_##TYPE##_reg (TYPE a, TYPE b) { return a * b; } \
      11    TEST_OP_IMM (TYPE, OP, a, MINV) \
      12    TEST_OP_IMM (TYPE, OP, b, 50) \
      13    TEST_OP_IMM (TYPE, OP, c, MAXV)
      14  
      15  #define TEST_TYPE(TYPE, SIZE, MINV, MAXV) \
      16    typedef TYPE TYPE##SIZE __attribute__((vector_size(SIZE))); \
      17    TEST_OP (TYPE##SIZE, MINV, MAXV)
      18  
      19  TEST_TYPE (int8_t, 32, -100, 100)
      20  TEST_TYPE (uint8_t, 32, 2, 250)
      21  
      22  TEST_TYPE (int8_t, 64, -110, 110)
      23  TEST_TYPE (uint8_t, 64, 3, 253)
      24  TEST_TYPE (int16_t, 64, -123, 123)
      25  TEST_TYPE (uint16_t, 64, 3, 255)
      26  
      27  TEST_TYPE (int8_t, 128, -119, 120)
      28  TEST_TYPE (uint8_t, 128, 4, 251)
      29  TEST_TYPE (int16_t, 128, -123, 123)
      30  TEST_TYPE (uint16_t, 128, 2, 255)
      31  TEST_TYPE (int32_t, 128, -123, 123)
      32  TEST_TYPE (uint32_t, 128, 4, 255)
      33  
      34  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, p[0-7]/m, z[0-9]+\.b, z[0-9]+\.b\n} 6 } } */
      35  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */
      36  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */
      37  
      38  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-100\n} 1 } } */
      39  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-110\n} 1 } } */
      40  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-119\n} 1 } } */
      41  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #-123\n} 2 } } */
      42  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #-123\n} 1 } } */
      43  
      44  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #50\n} 6 } } */
      45  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #50\n} 4 } } */
      46  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #50\n} 2 } } */
      47  
      48  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #100\n} 1 } } */
      49  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #110\n} 1 } } */
      50  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #120\n} 1 } } */
      51  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #123\n} 2 } } */
      52  /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #123\n} 1 } } */