(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
sve/
mov_rr_1.c
       1  /* { dg-do assemble { target aarch64_asm_sve_ok } } */
       2  /* { dg-options "-O3 -msve-vector-bits=256 --save-temps" } */
       3  
       4  void sve_copy_rr (void)
       5  {
       6    typedef int vnx4si __attribute__((vector_size(32)));
       7    register vnx4si x asm ("z1");
       8    register vnx4si y asm ("z2");
       9    asm volatile ("#foo" : "=w" (x));
      10    y = x;
      11    asm volatile ("#foo" :: "w" (y));
      12  }
      13  
      14  /* { dg-final { scan-assembler-times {\tmov\tz[0-9]+\.d, z[0-9]+\.d\n} 1 } } */