1  /* { dg-do compile } */
       2  /* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=256 -fno-tree-loop-distribute-patterns" } */
       3  
       4  #define SIZE (15 * 8 + 3)
       5  
       6  #define DEF_INDEX_OFFSET(SIGNED, TYPE, ITERTYPE)			\
       7  void __attribute__ ((noinline, noclone))				\
       8  set_##SIGNED##_##TYPE##_##ITERTYPE (SIGNED TYPE *restrict out,		\
       9  				    SIGNED TYPE *restrict in)		\
      10  {									\
      11    SIGNED ITERTYPE i;							\
      12    for (i = 0; i < SIZE; i++)						\
      13    {									\
      14      out[i] = in[i];							\
      15    }									\
      16  }									\
      17  void __attribute__ ((noinline, noclone))				\
      18  set_##SIGNED##_##TYPE##_##ITERTYPE##_var (SIGNED TYPE *restrict out,	\
      19  					  SIGNED TYPE *restrict in,	\
      20  					  SIGNED ITERTYPE n)		\
      21  {									\
      22    SIGNED ITERTYPE i;							\
      23    for (i = 0; i < n; i++)						\
      24    {									\
      25      out[i] = in[i];							\
      26    }									\
      27  }
      28  
      29  #define TEST_TYPE(T, SIGNED, TYPE)		\
      30    T (SIGNED, TYPE, char)			\
      31    T (SIGNED, TYPE, short)			\
      32    T (SIGNED, TYPE, int)				\
      33    T (SIGNED, TYPE, long)
      34  
      35  #define TEST_ALL(T)				\
      36    TEST_TYPE (T, signed, long)			\
      37    TEST_TYPE (T, unsigned, long)			\
      38    TEST_TYPE (T, signed, int)			\
      39    TEST_TYPE (T, unsigned, int)			\
      40    TEST_TYPE (T, signed, short)			\
      41    TEST_TYPE (T, unsigned, short)		\
      42    TEST_TYPE (T, signed, char)			\
      43    TEST_TYPE (T, unsigned, char)
      44  
      45  TEST_ALL (DEF_INDEX_OFFSET)
      46  
      47  /* { dg-final { scan-assembler-times "ld1d\\tz\[0-9\]+.d, p\[0-9\]+/z, \\\[x\[0-9\]+, x\[0-9\]+, lsl 3\\\]" 16 } } */
      48  /* { dg-final { scan-assembler-times "st1d\\tz\[0-9\]+.d, p\[0-9\]+, \\\[x\[0-9\]+, x\[0-9\]+, lsl 3\\\]" 16 } } */
      49  /* { dg-final { scan-assembler-times "ld1w\\tz\[0-9\]+.s, p\[0-9\]+/z, \\\[x\[0-9\]+, x\[0-9\]+, lsl 2\\\]" 16 } } */
      50  /* { dg-final { scan-assembler-times "st1w\\tz\[0-9\]+.s, p\[0-9\]+, \\\[x\[0-9\]+, x\[0-9\]+, lsl 2\\\]" 16 } } */
      51  /* { dg-final { scan-assembler-times "ld1h\\tz\[0-9\]+.h, p\[0-9\]+/z, \\\[x\[0-9\]+, x\[0-9\]+, lsl 1\\\]" 16 } } */
      52  /* { dg-final { scan-assembler-times "st1h\\tz\[0-9\]+.h, p\[0-9\]+, \\\[x\[0-9\]+, x\[0-9\]+, lsl 1\\\]" 16 } } */
      53  /* { dg-final { scan-assembler-times "ld1b\\tz\[0-9\]+.b, p\[0-9\]+/z, \\\[x\[0-9\]+, x\[0-9\]+\\\]" 16 } } */
      54  /* { dg-final { scan-assembler-times "st1b\\tz\[0-9\]+.b, p\[0-9\]+, \\\[x\[0-9\]+, x\[0-9\]+\\\]" 16 } } */