1  /* { dg-do assemble { target aarch64_asm_sve_ok } } */
       2  /* { dg-options "-O3 -msve-vector-bits=256 --save-temps" } */
       3  
       4  typedef _Float16 vnx8hf __attribute__((vector_size(32)));
       5  typedef float vnx4sf __attribute__((vector_size(32)));
       6  typedef double vnx2df __attribute__((vector_size(32)));
       7  
       8  #define DO_OP(TYPE)						\
       9  void vmad##TYPE (TYPE *x, TYPE y, TYPE z)			\
      10  {								\
      11    register TYPE dst  asm("z0");					\
      12    register TYPE src1 asm("z2");					\
      13    register TYPE src2 asm("z4");					\
      14    dst = *x;							\
      15    src1 = y;							\
      16    src2 = z;							\
      17    asm volatile ("" :: "w" (dst), "w" (src1), "w" (src2));	\
      18    dst = (src1 * src2) - dst;					\
      19    asm volatile ("" :: "w" (dst));				\
      20    *x = dst;							\
      21  }
      22  
      23  DO_OP (vnx8hf)
      24  DO_OP (vnx4sf)
      25  DO_OP (vnx2df)
      26  
      27  /* { dg-final { scan-assembler-times {\tfnmls\tz0\.h, p[0-7]/m, z2\.h, z4\.h\n} 1 } } */
      28  /* { dg-final { scan-assembler-times {\tfnmls\tz0\.s, p[0-7]/m, z2\.s, z4\.s\n} 1 } } */
      29  /* { dg-final { scan-assembler-times {\tfnmls\tz0\.d, p[0-7]/m, z2\.d, z4\.d\n} 1 } } */