1  /* { dg-do assemble { target aarch64_asm_sve_ok } } */
       2  /* { dg-options "-O3 --save-temps -fno-trapping-math" } */
       3  
       4  #define N 16
       5  
       6  typedef float *__restrict__ vnx4sf;
       7  typedef double *__restrict__ vnx2df;
       8  typedef _Float16 *__restrict__ vnx8hf_a;
       9  typedef __fp16 *__restrict__ vnx8hf_b;
      10  
      11  extern float fabsf (float);
      12  extern double fabs (double);
      13  
      14  #define FABD(type, abs, n)				\
      15  	void fabd_##type (type res, type a, type b)	\
      16  	{						\
      17  	    int i;					\
      18  	    for (i = 0; i < n; i++)			\
      19  		res[i] = abs (a[i] - b[i]);		\
      20  	}
      21  
      22  #define TEST_SVE_F_MODES(FUNC)	\
      23    FUNC (vnx2df, fabs, N)	\
      24    FUNC (vnx4sf, fabsf, N)	\
      25    FUNC (vnx8hf_a, fabsf, N)	\
      26    FUNC (vnx8hf_b, fabsf, N)	\
      27  
      28  TEST_SVE_F_MODES (FABD)
      29  
      30  /* { dg-final { scan-assembler "fabd" } } */
      31  /* { dg-final { scan-assembler-not "fsub" } } */
      32  /* { dg-final { scan-assembler-not "fabs" } } */
      33  /* { dg-final { scan-assembler-times {\tfabd\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
      34  /* { dg-final { scan-assembler-times {\tfabd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */
      35  /* { dg-final { scan-assembler-times {\tfabd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */