(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
sve/
extract_4.c
       1  /* { dg-do assemble { target aarch64_asm_sve_ok } } */
       2  /* { dg-options "-O -msve-vector-bits=2048 --save-temps" } */
       3  
       4  #include <stdint.h>
       5  
       6  typedef int64_t v32di __attribute__((vector_size (256)));
       7  typedef int32_t v64si __attribute__((vector_size (256)));
       8  typedef int16_t v128hi __attribute__((vector_size (256)));
       9  typedef int8_t v256qi __attribute__((vector_size (256)));
      10  typedef double v32df __attribute__((vector_size (256)));
      11  typedef float v64sf __attribute__((vector_size (256)));
      12  typedef _Float16 v128hf __attribute__((vector_size (256)));
      13  
      14  #define EXTRACT(ELT_TYPE, TYPE, INDEX)		\
      15    ELT_TYPE permute_##TYPE##_##INDEX (void)	\
      16    {						\
      17      TYPE values;				\
      18      asm ("" : "=w" (values));			\
      19      return values[INDEX];			\
      20    }
      21  
      22  #define TEST_ALL(T)				\
      23    T (int64_t, v32di, 0)				\
      24    T (int64_t, v32di, 1)				\
      25    T (int64_t, v32di, 2)				\
      26    T (int64_t, v32di, 7)				\
      27    T (int64_t, v32di, 8)				\
      28    T (int64_t, v32di, 9)				\
      29    T (int64_t, v32di, 15)			\
      30    T (int64_t, v32di, 31)			\
      31    T (int32_t, v64si, 0)				\
      32    T (int32_t, v64si, 1)				\
      33    T (int32_t, v64si, 3)				\
      34    T (int32_t, v64si, 4)				\
      35    T (int32_t, v64si, 15)			\
      36    T (int32_t, v64si, 16)			\
      37    T (int32_t, v64si, 21)			\
      38    T (int32_t, v64si, 31)			\
      39    T (int32_t, v64si, 63)			\
      40    T (int16_t, v128hi, 0)			\
      41    T (int16_t, v128hi, 1)			\
      42    T (int16_t, v128hi, 7)			\
      43    T (int16_t, v128hi, 8)			\
      44    T (int16_t, v128hi, 31)			\
      45    T (int16_t, v128hi, 32)			\
      46    T (int16_t, v128hi, 47)			\
      47    T (int16_t, v128hi, 63)			\
      48    T (int16_t, v128hi, 127)			\
      49    T (int8_t, v256qi, 0)				\
      50    T (int8_t, v256qi, 1)				\
      51    T (int8_t, v256qi, 15)			\
      52    T (int8_t, v256qi, 16)			\
      53    T (int8_t, v256qi, 63)			\
      54    T (int8_t, v256qi, 64)			\
      55    T (int8_t, v256qi, 100)			\
      56    T (int8_t, v256qi, 127)			\
      57    T (int8_t, v256qi, 255)			\
      58    T (double, v32df, 0)				\
      59    T (double, v32df, 1)				\
      60    T (double, v32df, 2)				\
      61    T (double, v32df, 7)				\
      62    T (double, v32df, 8)				\
      63    T (double, v32df, 9)				\
      64    T (double, v32df, 15)				\
      65    T (double, v32df, 31)				\
      66    T (float, v64sf, 0)				\
      67    T (float, v64sf, 1)				\
      68    T (float, v64sf, 3)				\
      69    T (float, v64sf, 4)				\
      70    T (float, v64sf, 15)				\
      71    T (float, v64sf, 16)				\
      72    T (float, v64sf, 21)				\
      73    T (float, v64sf, 31)				\
      74    T (float, v64sf, 63)				\
      75    T (_Float16, v128hf, 0)			\
      76    T (_Float16, v128hf, 1)			\
      77    T (_Float16, v128hf, 7)			\
      78    T (_Float16, v128hf, 8)			\
      79    T (_Float16, v128hf, 31)			\
      80    T (_Float16, v128hf, 32)			\
      81    T (_Float16, v128hf, 47)			\
      82    T (_Float16, v128hf, 63)			\
      83    T (_Float16, v128hf, 127)
      84  
      85  TEST_ALL (EXTRACT)
      86  
      87  /* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 6 { target aarch64_little_endian } } } */
      88  /* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 { target aarch64_big_endian } } } */
      89  /* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
      90  /* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
      91  /* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
      92  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[2\]\n} 2 } } */
      93  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[7\]\n} 2 } } */
      94  /* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
      95  /* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
      96  
      97  /* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 6 { target aarch64_little_endian } } } */
      98  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1 { target aarch64_big_endian } } } */
      99  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1 } } */
     100  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1 } } */
     101  /* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
     102  /* { dg-final { scan-assembler-times {\tdup\ts[0-9]+, v[0-9]+\.s\[1\]\n} 1 } } */
     103  /* { dg-final { scan-assembler-times {\tdup\ts[0-9]+, v[0-9]+\.s\[3\]\n} 1 } } */
     104  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[4\]\n} 2 } } */
     105  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[15\]\n} 2 } } */
     106  /* { dg-final { scan-assembler-times {\tlastb\tw[0-9]+, p[0-7], z[0-9]+\.s\n} 1 } } */
     107  /* { dg-final { scan-assembler-times {\tlastb\ts[0-9]+, p[0-7], z[0-9]+\.s\n} 1 } } */
     108  
     109  /* Also used to move the result of a non-Advanced SIMD extract.  */
     110  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.h\[0\]\n} 6 } } */
     111  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.h\[1\]\n} 1 } } */
     112  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.h\[7\]\n} 1 } } */
     113  /* { dg-final { scan-assembler-not {\tdup\th[0-9]+, v[0-9]+\.h\[0\]\n} } } */
     114  /* { dg-final { scan-assembler-times {\tdup\th[0-9]+, v[0-9]+\.h\[1\]\n} 1 } } */
     115  /* { dg-final { scan-assembler-times {\tdup\th[0-9]+, v[0-9]+\.h\[7\]\n} 1 } } */
     116  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[8\]\n} 2 } } */
     117  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[31\]\n} 2 } } */
     118  /* { dg-final { scan-assembler-times {\tlastb\tw[0-9]+, p[0-7], z[0-9]+\.h\n} 1 } } */
     119  /* { dg-final { scan-assembler-times {\tlastb\th[0-9]+, p[0-7], z[0-9]+\.h\n} 1 } } */
     120  
     121  /* Also used to move the result of a non-Advanced SIMD extract.  */
     122  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.b\[0\]\n} 6 } } */
     123  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.b\[1\]\n} 1 } } */
     124  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.b\[15\]\n} 1 } } */
     125  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[16\]\n} 1 } } */
     126  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[63\]\n} 1 } } */
     127  /* { dg-final { scan-assembler-times {\tlastb\tw[0-9]+, p[0-7], z[0-9]+\.b\n} 1 } } */
     128  
     129  /* { dg-final { scan-assembler-times {\text\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b, #64\n} 7 } } */
     130  /* { dg-final { scan-assembler-times {\text\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b, #72\n} 2 } } */
     131  /* { dg-final { scan-assembler-times {\text\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b, #84\n} 2 } } */
     132  /* { dg-final { scan-assembler-times {\text\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b, #94\n} 2 } } */
     133  /* { dg-final { scan-assembler-times {\text\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b, #100\n} 1 } } */
     134  /* { dg-final { scan-assembler-times {\text\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b, #120\n} 2 } } */
     135  /* { dg-final { scan-assembler-times {\text\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b, #124\n} 2 } } */
     136  /* { dg-final { scan-assembler-times {\text\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b, #126\n} 2 } } */
     137  /* { dg-final { scan-assembler-times {\text\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b, #127\n} 1 } } */