(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
sve/
extract_2.c
       1  /* { dg-do assemble { target aarch64_asm_sve_ok } } */
       2  /* { dg-options "-O -msve-vector-bits=512 --save-temps" } */
       3  
       4  #include <stdint.h>
       5  
       6  typedef int64_t vnx4di __attribute__((vector_size (64)));
       7  typedef int32_t vnx8si __attribute__((vector_size (64)));
       8  typedef int16_t vnx16hi __attribute__((vector_size (64)));
       9  typedef int8_t vnx32qi __attribute__((vector_size (64)));
      10  typedef double vnx4df __attribute__((vector_size (64)));
      11  typedef float vnx8sf __attribute__((vector_size (64)));
      12  typedef _Float16 vnx16hf __attribute__((vector_size (64)));
      13  
      14  #define EXTRACT(ELT_TYPE, TYPE, INDEX)		\
      15    ELT_TYPE permute_##TYPE##_##INDEX (void)	\
      16    {						\
      17      TYPE values;				\
      18      asm ("" : "=w" (values));			\
      19      return values[INDEX];			\
      20    }
      21  
      22  #define TEST_ALL(T)				\
      23    T (int64_t, vnx4di, 0)			\
      24    T (int64_t, vnx4di, 1)			\
      25    T (int64_t, vnx4di, 2)			\
      26    T (int64_t, vnx4di, 7)			\
      27    T (int32_t, vnx8si, 0)			\
      28    T (int32_t, vnx8si, 1)			\
      29    T (int32_t, vnx8si, 3)			\
      30    T (int32_t, vnx8si, 4)			\
      31    T (int32_t, vnx8si, 15)			\
      32    T (int16_t, vnx16hi, 0)			\
      33    T (int16_t, vnx16hi, 1)			\
      34    T (int16_t, vnx16hi, 7)			\
      35    T (int16_t, vnx16hi, 8)			\
      36    T (int16_t, vnx16hi, 31)			\
      37    T (int8_t, vnx32qi, 0)			\
      38    T (int8_t, vnx32qi, 1)			\
      39    T (int8_t, vnx32qi, 15)			\
      40    T (int8_t, vnx32qi, 16)			\
      41    T (int8_t, vnx32qi, 63)			\
      42    T (double, vnx4df, 0)				\
      43    T (double, vnx4df, 1)				\
      44    T (double, vnx4df, 2)				\
      45    T (double, vnx4df, 7)				\
      46    T (float, vnx8sf, 0)				\
      47    T (float, vnx8sf, 1)				\
      48    T (float, vnx8sf, 3)				\
      49    T (float, vnx8sf, 4)				\
      50    T (float, vnx8sf, 15)				\
      51    T (_Float16, vnx16hf, 0)			\
      52    T (_Float16, vnx16hf, 1)			\
      53    T (_Float16, vnx16hf, 7)			\
      54    T (_Float16, vnx16hf, 8)			\
      55    T (_Float16, vnx16hf, 31)
      56  
      57  TEST_ALL (EXTRACT)
      58  
      59  /* { dg-final { scan-assembler-times {\tfmov\tx[0-9]+, d[0-9]\n} 2 { target aarch64_little_endian } } } */
      60  /* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[0\]\n} 1 { target aarch64_big_endian } } } */
      61  /* { dg-final { scan-assembler-times {\tumov\tx[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
      62  /* { dg-final { scan-assembler-not {\tdup\td[0-9]+, v[0-9]+\.d\[0\]\n} } } */
      63  /* { dg-final { scan-assembler-times {\tdup\td[0-9]+, v[0-9]+\.d\[1\]\n} 1 } } */
      64  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.d, z[0-9]+\.d\[2\]\n} 2 } } */
      65  /* { dg-final { scan-assembler-times {\tlastb\tx[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
      66  /* { dg-final { scan-assembler-times {\tlastb\td[0-9]+, p[0-7], z[0-9]+\.d\n} 1 } } */
      67  
      68  /* { dg-final { scan-assembler-times {\tfmov\tw[0-9]+, s[0-9]\n} 2 { target aarch64_little_endian } } } */
      69  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[0\]\n} 1 { target aarch64_big_endian } } } */
      70  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[1\]\n} 1 } } */
      71  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.s\[3\]\n} 1 } } */
      72  /* { dg-final { scan-assembler-not {\tdup\ts[0-9]+, v[0-9]+\.s\[0\]\n} } } */
      73  /* { dg-final { scan-assembler-times {\tdup\ts[0-9]+, v[0-9]+\.s\[1\]\n} 1 } } */
      74  /* { dg-final { scan-assembler-times {\tdup\ts[0-9]+, v[0-9]+\.s\[3\]\n} 1 } } */
      75  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.s, z[0-9]+\.s\[4\]\n} 2 } } */
      76  /* { dg-final { scan-assembler-times {\tlastb\tw[0-9]+, p[0-7], z[0-9]+\.s\n} 1 } } */
      77  /* { dg-final { scan-assembler-times {\tlastb\ts[0-9]+, p[0-7], z[0-9]+\.s\n} 1 } } */
      78  
      79  /* Also used to move the result of a non-Advanced SIMD extract.  */
      80  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.h\[0\]\n} 2 } } */
      81  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.h\[1\]\n} 1 } } */
      82  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.h\[7\]\n} 1 } } */
      83  /* { dg-final { scan-assembler-not {\tdup\th[0-9]+, v[0-9]+\.h\[0\]\n} } } */
      84  /* { dg-final { scan-assembler-times {\tdup\th[0-9]+, v[0-9]+\.h\[1\]\n} 1 } } */
      85  /* { dg-final { scan-assembler-times {\tdup\th[0-9]+, v[0-9]+\.h\[7\]\n} 1 } } */
      86  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.h, z[0-9]+\.h\[8\]\n} 2 } } */
      87  /* { dg-final { scan-assembler-times {\tlastb\tw[0-9]+, p[0-7], z[0-9]+\.h\n} 1 } } */
      88  /* { dg-final { scan-assembler-times {\tlastb\th[0-9]+, p[0-7], z[0-9]+\.h\n} 1 } } */
      89  
      90  /* Also used to move the result of a non-Advanced SIMD extract.  */
      91  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.b\[0\]\n} 2 } } */
      92  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.b\[1\]\n} 1 } } */
      93  /* { dg-final { scan-assembler-times {\tumov\tw[0-9]+, v[0-9]+\.b\[15\]\n} 1 } } */
      94  /* { dg-final { scan-assembler-times {\tdup\tz[0-9]+\.b, z[0-9]+\.b\[16\]\n} 1 } } */
      95  /* { dg-final { scan-assembler-times {\tlastb\tw[0-9]+, p[0-7], z[0-9]+\.b\n} 1 } } */