1  /* { dg-do compile } */
       2  /* { dg-require-effective-target lp64 } */
       3  /* { dg-additional-options "-O -msve-vector-bits=512 -fdump-tree-optimized" } */
       4  /* { dg-final { check-function-bodies "**" "" } } */
       5  
       6  #include <arm_sve.h>
       7  
       8  #ifdef __cplusplus
       9  extern "C" {
      10  #endif
      11  
      12  /*
      13  ** load_vl1:
      14  **	ptrue	(p[0-7])\.[bhsd], vl1
      15  **	ld1h	z0\.h, \1/z, \[x0\]
      16  **	ret
      17  */
      18  svint16_t
      19  load_vl1 (int16_t *ptr)
      20  {
      21    return svld1 (svwhilelt_b16 (0, 1), ptr);
      22  }
      23  
      24  /*
      25  ** load_vl2:
      26  **	ptrue	(p[0-7])\.h, vl2
      27  **	ld1h	z0\.h, \1/z, \[x0\]
      28  **	ret
      29  */
      30  svint16_t
      31  load_vl2 (int16_t *ptr)
      32  {
      33    return svld1 (svwhilelt_b16 (0, 2), ptr);
      34  }
      35  
      36  /*
      37  ** load_vl3:
      38  **	ptrue	(p[0-7])\.h, vl3
      39  **	ld1h	z0\.h, \1/z, \[x0\]
      40  **	ret
      41  */
      42  svint16_t
      43  load_vl3 (int16_t *ptr)
      44  {
      45    return svld1 (svwhilelt_b16 (0, 3), ptr);
      46  }
      47  
      48  /*
      49  ** load_vl4:
      50  **	ptrue	(p[0-7])\.h, vl4
      51  **	ld1h	z0\.h, \1/z, \[x0\]
      52  **	ret
      53  */
      54  svint16_t
      55  load_vl4 (int16_t *ptr)
      56  {
      57    return svld1 (svwhilelt_b16 (0, 4), ptr);
      58  }
      59  
      60  /*
      61  ** load_vl5:
      62  **	ptrue	(p[0-7])\.h, vl5
      63  **	ld1h	z0\.h, \1/z, \[x0\]
      64  **	ret
      65  */
      66  svint16_t
      67  load_vl5 (int16_t *ptr)
      68  {
      69    return svld1 (svwhilelt_b16 (0, 5), ptr);
      70  }
      71  
      72  /*
      73  ** load_vl6:
      74  **	ptrue	(p[0-7])\.h, vl6
      75  **	ld1h	z0\.h, \1/z, \[x0\]
      76  **	ret
      77  */
      78  svint16_t
      79  load_vl6 (int16_t *ptr)
      80  {
      81    return svld1 (svwhilelt_b16 (0, 6), ptr);
      82  }
      83  
      84  /*
      85  ** load_vl7:
      86  **	ptrue	(p[0-7])\.h, vl7
      87  **	ld1h	z0\.h, \1/z, \[x0\]
      88  **	ret
      89  */
      90  svint16_t
      91  load_vl7 (int16_t *ptr)
      92  {
      93    return svld1 (svwhilelt_b16 (0, 7), ptr);
      94  }
      95  
      96  /*
      97  ** load_vl8:
      98  **	ptrue	(p[0-7])\.h, vl8
      99  **	ld1h	z0\.h, \1/z, \[x0\]
     100  **	ret
     101  */
     102  svint16_t
     103  load_vl8 (int16_t *ptr)
     104  {
     105    return svld1 (svwhilelt_b16 (0, 8), ptr);
     106  }
     107  
     108  /*
     109  ** load_vl9:
     110  **	mov	(x[0-9]+), #?9
     111  **	whilelo	(p[0-7])\.h, xzr, \1
     112  **	ld1h	z0\.h, \2/z, \[x0\]
     113  **	ret
     114  */
     115  svint16_t
     116  load_vl9 (int16_t *ptr)
     117  {
     118    return svld1 (svwhilelt_b16 (0, 9), ptr);
     119  }
     120  
     121  /*
     122  ** load_vl15:
     123  **	mov	(x[0-9]+), #?15
     124  **	whilelo	(p[0-7])\.h, xzr, \1
     125  **	ld1h	z0\.h, \2/z, \[x0\]
     126  **	ret
     127  */
     128  svint16_t
     129  load_vl15 (int16_t *ptr)
     130  {
     131    return svld1 (svwhilelt_b16 (0, 15), ptr);
     132  }
     133  
     134  /*
     135  ** load_vl16:
     136  **	ptrue	(p[0-7])\.h, vl16
     137  **	ld1h	z0\.h, \1/z, \[x0\]
     138  **	ret
     139  */
     140  svint16_t
     141  load_vl16 (int16_t *ptr)
     142  {
     143    return svld1 (svwhilelt_b16 (0, 16), ptr);
     144  }
     145  
     146  /*
     147  ** load_vl17:
     148  **	mov	(x[0-9]+), #?17
     149  **	whilelo	(p[0-7])\.h, xzr, \1
     150  **	ld1h	z0\.h, \2/z, \[x0\]
     151  **	ret
     152  */
     153  svint16_t
     154  load_vl17 (int16_t *ptr)
     155  {
     156    return svld1 (svwhilelt_b16 (0, 17), ptr);
     157  }
     158  
     159  #ifdef __cplusplus
     160  }
     161  #endif
     162  
     163  /* { dg-final { scan-tree-dump-not "VIEW_CONVERT_EXPR" "optimized" } } */