1  /* { dg-require-effective-target aarch64_asm_i8mm_ok } */
       2  /* { dg-additional-options "-march=armv8.2-a+sve+i8mm" } */
       3  /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
       4  
       5  #include "test_sve_acle.h"
       6  
       7  /*
       8  ** usdot_lane_0_s32_tied1:
       9  **	usdot	z0\.s, z2\.b, z4\.b\[0\]
      10  **	ret
      11  */
      12  TEST_TRIPLE_Z (usdot_lane_0_s32_tied1, svint32_t, svuint8_t, svint8_t,
      13  	       z0 = svusdot_lane_s32 (z0, z2, z4, 0),
      14  	       z0 = svusdot_lane (z0, z2, z4, 0))
      15  
      16  /*
      17  ** usdot_lane_0_s32_tied2:
      18  **	mov	(z[0-9]+)\.d, z0\.d
      19  **	movprfx	z0, z2
      20  **	usdot	z0\.s, \1\.b, z4\.b\[0\]
      21  **	ret
      22  */
      23  TEST_TRIPLE_Z_REV2 (usdot_lane_0_s32_tied2, svint32_t, svuint8_t, svint8_t,
      24  		    z0_res = svusdot_lane_s32 (z2, z0, z4, 0),
      25  		    z0_res = svusdot_lane (z2, z0, z4, 0))
      26  
      27  /*
      28  ** usdot_lane_0_s32_tied3:
      29  **	mov	(z[0-9]+)\.d, z0\.d
      30  **	movprfx	z0, z4
      31  **	usdot	z0\.s, z2\.b, \1\.b\[0\]
      32  **	ret
      33  */
      34  TEST_TRIPLE_Z_REV (usdot_lane_0_s32_tied3, svint32_t, svuint8_t, svint8_t,
      35  		   z0_res = svusdot_lane_s32 (z4, z2, z0, 0),
      36  		   z0_res = svusdot_lane (z4, z2, z0, 0))
      37  
      38  /*
      39  ** usdot_lane_0_s32_untied:
      40  **	movprfx	z0, z1
      41  **	usdot	z0\.s, z2\.b, z4\.b\[0\]
      42  **	ret
      43  */
      44  TEST_TRIPLE_Z (usdot_lane_0_s32_untied, svint32_t, svuint8_t, svint8_t,
      45  	       z0 = svusdot_lane_s32 (z1, z2, z4, 0),
      46  	       z0 = svusdot_lane (z1, z2, z4, 0))
      47  
      48  /*
      49  ** usdot_lane_1_s32:
      50  **	usdot	z0\.s, z2\.b, z5\.b\[1\]
      51  **	ret
      52  */
      53  TEST_TRIPLE_Z (usdot_lane_1_s32, svint32_t, svuint8_t, svint8_t,
      54  	       z0 = svusdot_lane_s32 (z0, z2, z5, 1),
      55  	       z0 = svusdot_lane (z0, z2, z5, 1))
      56  
      57  /*
      58  ** usdot_lane_2_s32:
      59  **	usdot	z0\.s, z2\.b, z5\.b\[2\]
      60  **	ret
      61  */
      62  TEST_TRIPLE_Z (usdot_lane_2_s32, svint32_t, svuint8_t, svint8_t,
      63  	       z0 = svusdot_lane_s32 (z0, z2, z5, 2),
      64  	       z0 = svusdot_lane (z0, z2, z5, 2))
      65  
      66  /*
      67  ** usdot_lane_3_s32:
      68  **	usdot	z0\.s, z2\.b, z5\.b\[3\]
      69  **	ret
      70  */
      71  TEST_TRIPLE_Z (usdot_lane_3_s32, svint32_t, svuint8_t, svint8_t,
      72  	       z0 = svusdot_lane_s32 (z0, z2, z5, 3),
      73  	       z0 = svusdot_lane (z0, z2, z5, 3))
      74  
      75  /*
      76  ** usdot_lane_z8_s32:
      77  **	str	d8, \[sp, -16\]!
      78  **	mov	(z[0-7])\.d, z8\.d
      79  **	usdot	z0\.s, z1\.b, \1\.b\[1\]
      80  **	ldr	d8, \[sp\], 16
      81  **	ret
      82  */
      83  TEST_TRIPLE_LANE_REG (usdot_lane_z8_s32, svint32_t, svuint8_t, svint8_t,
      84  		      z8,
      85  		      z0 = svusdot_lane_s32 (z0, z1, z8, 1),
      86  		      z0 = svusdot_lane (z0, z1, z8, 1))
      87  
      88  /*
      89  ** usdot_lane_z16_s32:
      90  **	mov	(z[0-7])\.d, z16\.d
      91  **	usdot	z0\.s, z1\.b, \1\.b\[1\]
      92  **	ret
      93  */
      94  TEST_TRIPLE_LANE_REG (usdot_lane_z16_s32, svint32_t, svuint8_t, svint8_t,
      95  		      z16,
      96  		      z0 = svusdot_lane_s32 (z0, z1, z16, 1),
      97  		      z0 = svusdot_lane (z0, z1, z16, 1))