1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" { target { ! ilp32 } } } } */
2
3 #include "test_sve_acle.h"
4
5 /*
6 ** st1h_scatter_u32:
7 ** st1h z0\.s, p0, \[z1\.s\]
8 ** ret
9 */
10 TEST_STORE_SCATTER_ZS (st1h_scatter_u32, svuint32_t, svuint32_t,
11 svst1h_scatter_u32base_u32 (p0, z1, z0),
12 svst1h_scatter (p0, z1, z0))
13
14 /*
15 ** st1h_scatter_x0_u32_offset:
16 ** st1h z0\.s, p0, \[x0, z1\.s, uxtw\]
17 ** ret
18 */
19 TEST_STORE_SCATTER_ZS (st1h_scatter_x0_u32_offset, svuint32_t, svuint32_t,
20 svst1h_scatter_u32base_offset_u32 (p0, z1, x0, z0),
21 svst1h_scatter_offset (p0, z1, x0, z0))
22
23 /*
24 ** st1h_scatter_m2_u32_offset:
25 ** mov (x[0-9]+), #?-2
26 ** st1h z0\.s, p0, \[\1, z1\.s, uxtw\]
27 ** ret
28 */
29 TEST_STORE_SCATTER_ZS (st1h_scatter_m2_u32_offset, svuint32_t, svuint32_t,
30 svst1h_scatter_u32base_offset_u32 (p0, z1, -2, z0),
31 svst1h_scatter_offset (p0, z1, -2, z0))
32
33 /*
34 ** st1h_scatter_0_u32_offset:
35 ** st1h z0\.s, p0, \[z1\.s\]
36 ** ret
37 */
38 TEST_STORE_SCATTER_ZS (st1h_scatter_0_u32_offset, svuint32_t, svuint32_t,
39 svst1h_scatter_u32base_offset_u32 (p0, z1, 0, z0),
40 svst1h_scatter_offset (p0, z1, 0, z0))
41
42 /*
43 ** st1h_scatter_5_u32_offset:
44 ** mov (x[0-9]+), #?5
45 ** st1h z0\.s, p0, \[\1, z1\.s, uxtw\]
46 ** ret
47 */
48 TEST_STORE_SCATTER_ZS (st1h_scatter_5_u32_offset, svuint32_t, svuint32_t,
49 svst1h_scatter_u32base_offset_u32 (p0, z1, 5, z0),
50 svst1h_scatter_offset (p0, z1, 5, z0))
51
52 /*
53 ** st1h_scatter_6_u32_offset:
54 ** st1h z0\.s, p0, \[z1\.s, #6\]
55 ** ret
56 */
57 TEST_STORE_SCATTER_ZS (st1h_scatter_6_u32_offset, svuint32_t, svuint32_t,
58 svst1h_scatter_u32base_offset_u32 (p0, z1, 6, z0),
59 svst1h_scatter_offset (p0, z1, 6, z0))
60
61 /*
62 ** st1h_scatter_62_u32_offset:
63 ** st1h z0\.s, p0, \[z1\.s, #62\]
64 ** ret
65 */
66 TEST_STORE_SCATTER_ZS (st1h_scatter_62_u32_offset, svuint32_t, svuint32_t,
67 svst1h_scatter_u32base_offset_u32 (p0, z1, 62, z0),
68 svst1h_scatter_offset (p0, z1, 62, z0))
69
70 /*
71 ** st1h_scatter_64_u32_offset:
72 ** mov (x[0-9]+), #?64
73 ** st1h z0\.s, p0, \[\1, z1\.s, uxtw\]
74 ** ret
75 */
76 TEST_STORE_SCATTER_ZS (st1h_scatter_64_u32_offset, svuint32_t, svuint32_t,
77 svst1h_scatter_u32base_offset_u32 (p0, z1, 64, z0),
78 svst1h_scatter_offset (p0, z1, 64, z0))
79
80 /*
81 ** st1h_scatter_x0_u32_index:
82 ** lsl (x[0-9]+), x0, #?1
83 ** st1h z0\.s, p0, \[\1, z1\.s, uxtw\]
84 ** ret
85 */
86 TEST_STORE_SCATTER_ZS (st1h_scatter_x0_u32_index, svuint32_t, svuint32_t,
87 svst1h_scatter_u32base_index_u32 (p0, z1, x0, z0),
88 svst1h_scatter_index (p0, z1, x0, z0))
89
90 /*
91 ** st1h_scatter_m1_u32_index:
92 ** mov (x[0-9]+), #?-2
93 ** st1h z0\.s, p0, \[\1, z1\.s, uxtw\]
94 ** ret
95 */
96 TEST_STORE_SCATTER_ZS (st1h_scatter_m1_u32_index, svuint32_t, svuint32_t,
97 svst1h_scatter_u32base_index_u32 (p0, z1, -1, z0),
98 svst1h_scatter_index (p0, z1, -1, z0))
99
100 /*
101 ** st1h_scatter_0_u32_index:
102 ** st1h z0\.s, p0, \[z1\.s\]
103 ** ret
104 */
105 TEST_STORE_SCATTER_ZS (st1h_scatter_0_u32_index, svuint32_t, svuint32_t,
106 svst1h_scatter_u32base_index_u32 (p0, z1, 0, z0),
107 svst1h_scatter_index (p0, z1, 0, z0))
108
109 /*
110 ** st1h_scatter_5_u32_index:
111 ** st1h z0\.s, p0, \[z1\.s, #10\]
112 ** ret
113 */
114 TEST_STORE_SCATTER_ZS (st1h_scatter_5_u32_index, svuint32_t, svuint32_t,
115 svst1h_scatter_u32base_index_u32 (p0, z1, 5, z0),
116 svst1h_scatter_index (p0, z1, 5, z0))
117
118 /*
119 ** st1h_scatter_31_u32_index:
120 ** st1h z0\.s, p0, \[z1\.s, #62\]
121 ** ret
122 */
123 TEST_STORE_SCATTER_ZS (st1h_scatter_31_u32_index, svuint32_t, svuint32_t,
124 svst1h_scatter_u32base_index_u32 (p0, z1, 31, z0),
125 svst1h_scatter_index (p0, z1, 31, z0))
126
127 /*
128 ** st1h_scatter_32_u32_index:
129 ** mov (x[0-9]+), #?64
130 ** st1h z0\.s, p0, \[\1, z1\.s, uxtw\]
131 ** ret
132 */
133 TEST_STORE_SCATTER_ZS (st1h_scatter_32_u32_index, svuint32_t, svuint32_t,
134 svst1h_scatter_u32base_index_u32 (p0, z1, 32, z0),
135 svst1h_scatter_index (p0, z1, 32, z0))
136
137 /*
138 ** st1h_scatter_x0_u32_s32offset:
139 ** st1h z0\.s, p0, \[x0, z1\.s, sxtw\]
140 ** ret
141 */
142 TEST_STORE_SCATTER_SZ (st1h_scatter_x0_u32_s32offset, svuint32_t, uint16_t, svint32_t,
143 svst1h_scatter_s32offset_u32 (p0, x0, z1, z0),
144 svst1h_scatter_offset (p0, x0, z1, z0))
145
146 /*
147 ** st1h_scatter_u32_s32offset:
148 ** st1h z0\.s, p0, \[x0, z1\.s, sxtw\]
149 ** ret
150 */
151 TEST_STORE_SCATTER_SZ (st1h_scatter_u32_s32offset, svuint32_t, uint16_t, svint32_t,
152 svst1h_scatter_s32offset_u32 (p0, x0, z1, z0),
153 svst1h_scatter_offset (p0, x0, z1, z0))
154
155 /*
156 ** st1h_scatter_x0_u32_u32offset:
157 ** st1h z0\.s, p0, \[x0, z1\.s, uxtw\]
158 ** ret
159 */
160 TEST_STORE_SCATTER_SZ (st1h_scatter_x0_u32_u32offset, svuint32_t, uint16_t, svuint32_t,
161 svst1h_scatter_u32offset_u32 (p0, x0, z1, z0),
162 svst1h_scatter_offset (p0, x0, z1, z0))
163
164 /*
165 ** st1h_scatter_u32_u32offset:
166 ** st1h z0\.s, p0, \[x0, z1\.s, uxtw\]
167 ** ret
168 */
169 TEST_STORE_SCATTER_SZ (st1h_scatter_u32_u32offset, svuint32_t, uint16_t, svuint32_t,
170 svst1h_scatter_u32offset_u32 (p0, x0, z1, z0),
171 svst1h_scatter_offset (p0, x0, z1, z0))
172
173 /*
174 ** st1h_scatter_x0_u32_s32index:
175 ** st1h z0\.s, p0, \[x0, z1\.s, sxtw 1\]
176 ** ret
177 */
178 TEST_STORE_SCATTER_SZ (st1h_scatter_x0_u32_s32index, svuint32_t, uint16_t, svint32_t,
179 svst1h_scatter_s32index_u32 (p0, x0, z1, z0),
180 svst1h_scatter_index (p0, x0, z1, z0))
181
182 /*
183 ** st1h_scatter_u32_s32index:
184 ** st1h z0\.s, p0, \[x0, z1\.s, sxtw 1\]
185 ** ret
186 */
187 TEST_STORE_SCATTER_SZ (st1h_scatter_u32_s32index, svuint32_t, uint16_t, svint32_t,
188 svst1h_scatter_s32index_u32 (p0, x0, z1, z0),
189 svst1h_scatter_index (p0, x0, z1, z0))
190
191 /*
192 ** st1h_scatter_x0_u32_u32index:
193 ** st1h z0\.s, p0, \[x0, z1\.s, uxtw 1\]
194 ** ret
195 */
196 TEST_STORE_SCATTER_SZ (st1h_scatter_x0_u32_u32index, svuint32_t, uint16_t, svuint32_t,
197 svst1h_scatter_u32index_u32 (p0, x0, z1, z0),
198 svst1h_scatter_index (p0, x0, z1, z0))
199
200 /*
201 ** st1h_scatter_u32_u32index:
202 ** st1h z0\.s, p0, \[x0, z1\.s, uxtw 1\]
203 ** ret
204 */
205 TEST_STORE_SCATTER_SZ (st1h_scatter_u32_u32index, svuint32_t, uint16_t, svuint32_t,
206 svst1h_scatter_u32index_u32 (p0, x0, z1, z0),
207 svst1h_scatter_index (p0, x0, z1, z0))