1  /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
       2  
       3  #include "test_sve_acle.h"
       4  
       5  /*
       6  ** qincw_1_s32_tied:
       7  **	sqincw	z0\.s
       8  **	ret
       9  */
      10  TEST_UNIFORM_Z (qincw_1_s32_tied, svint32_t,
      11  		z0 = svqincw_s32 (z0, 1),
      12  		z0 = svqincw (z0, 1))
      13  
      14  /*
      15  ** qincw_1_s32_untied:
      16  **	movprfx	z0, z1
      17  **	sqincw	z0\.s
      18  **	ret
      19  */
      20  TEST_UNIFORM_Z (qincw_1_s32_untied, svint32_t,
      21  		z0 = svqincw_s32 (z1, 1),
      22  		z0 = svqincw (z1, 1))
      23  
      24  /*
      25  ** qincw_2_s32:
      26  **	sqincw	z0\.s, all, mul #2
      27  **	ret
      28  */
      29  TEST_UNIFORM_Z (qincw_2_s32, svint32_t,
      30  		z0 = svqincw_s32 (z0, 2),
      31  		z0 = svqincw (z0, 2))
      32  
      33  /*
      34  ** qincw_7_s32:
      35  **	sqincw	z0\.s, all, mul #7
      36  **	ret
      37  */
      38  TEST_UNIFORM_Z (qincw_7_s32, svint32_t,
      39  		z0 = svqincw_s32 (z0, 7),
      40  		z0 = svqincw (z0, 7))
      41  
      42  /*
      43  ** qincw_15_s32:
      44  **	sqincw	z0\.s, all, mul #15
      45  **	ret
      46  */
      47  TEST_UNIFORM_Z (qincw_15_s32, svint32_t,
      48  		z0 = svqincw_s32 (z0, 15),
      49  		z0 = svqincw (z0, 15))
      50  
      51  /*
      52  ** qincw_16_s32:
      53  **	sqincw	z0\.s, all, mul #16
      54  **	ret
      55  */
      56  TEST_UNIFORM_Z (qincw_16_s32, svint32_t,
      57  		z0 = svqincw_s32 (z0, 16),
      58  		z0 = svqincw (z0, 16))
      59  
      60  /*
      61  ** qincw_n_1_s32_tied:
      62  **	sqincw	x0, w0
      63  **	ret
      64  */
      65  TEST_UNIFORM_S (qincw_n_1_s32_tied, int32_t,
      66  		x0 = svqincw_n_s32 (x0, 1),
      67  		x0 = svqincw (x0, 1))
      68  
      69  /*
      70  ** qincw_n_1_s32_untied:
      71  **	mov	w0, w1
      72  **	sqincw	x0, w0
      73  **	ret
      74  */
      75  TEST_UNIFORM_S (qincw_n_1_s32_untied, int32_t,
      76  		x0 = svqincw_n_s32 (x1, 1),
      77  		x0 = svqincw (x1, 1))
      78  
      79  /*
      80  ** qincw_n_2_s32:
      81  **	sqincw	x0, w0, all, mul #2
      82  **	ret
      83  */
      84  TEST_UNIFORM_S (qincw_n_2_s32, int32_t,
      85  		x0 = svqincw_n_s32 (x0, 2),
      86  		x0 = svqincw (x0, 2))
      87  
      88  /*
      89  ** qincw_n_7_s32:
      90  **	sqincw	x0, w0, all, mul #7
      91  **	ret
      92  */
      93  TEST_UNIFORM_S (qincw_n_7_s32, int32_t,
      94  		x0 = svqincw_n_s32 (x0, 7),
      95  		x0 = svqincw (x0, 7))
      96  
      97  /*
      98  ** qincw_n_15_s32:
      99  **	sqincw	x0, w0, all, mul #15
     100  **	ret
     101  */
     102  TEST_UNIFORM_S (qincw_n_15_s32, int32_t,
     103  		x0 = svqincw_n_s32 (x0, 15),
     104  		x0 = svqincw (x0, 15))
     105  
     106  /*
     107  ** qincw_n_16_s32:
     108  **	sqincw	x0, w0, all, mul #16
     109  **	ret
     110  */
     111  TEST_UNIFORM_S (qincw_n_16_s32, int32_t,
     112  		x0 = svqincw_n_s32 (x0, 16),
     113  		x0 = svqincw (x0, 16))