1  /* { dg-require-effective-target aarch64_asm_i8mm_ok } */
       2  /* { dg-additional-options "-march=armv8.2-a+sve+i8mm" } */
       3  /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
       4  
       5  #include "test_sve_acle.h"
       6  
       7  /*
       8  ** mmla_u32_tied1:
       9  **	ummla	z0\.s, z4\.b, z5\.b
      10  **	ret
      11  */
      12  TEST_DUAL_Z (mmla_u32_tied1, svuint32_t, svuint8_t,
      13  	     z0 = svmmla_u32 (z0, z4, z5),
      14  	     z0 = svmmla (z0, z4, z5))
      15  
      16  /*
      17  ** mmla_u32_tied2:
      18  **	mov	(z[0-9]+)\.d, z0\.d
      19  **	movprfx	z0, z4
      20  **	ummla	z0\.s, \1\.b, z1\.b
      21  **	ret
      22  */
      23  TEST_DUAL_Z_REV (mmla_u32_tied2, svuint32_t, svuint8_t,
      24  		 z0_res = svmmla_u32 (z4, z0, z1),
      25  		 z0_res = svmmla (z4, z0, z1))
      26  
      27  /*
      28  ** mmla_u32_tied3:
      29  **	mov	(z[0-9]+)\.d, z0\.d
      30  **	movprfx	z0, z4
      31  **	ummla	z0\.s, z1\.b, \1\.b
      32  **	ret
      33  */
      34  TEST_DUAL_Z_REV (mmla_u32_tied3, svuint32_t, svuint8_t,
      35  		 z0_res = svmmla_u32 (z4, z1, z0),
      36  		 z0_res = svmmla (z4, z1, z0))
      37  
      38  /*
      39  ** mmla_u32_untied:
      40  **	movprfx	z0, z1
      41  **	ummla	z0\.s, z4\.b, z5\.b
      42  **	ret
      43  */
      44  TEST_DUAL_Z (mmla_u32_untied, svuint32_t, svuint8_t,
      45  	     z0 = svmmla_u32 (z1, z4, z5),
      46  	     z0 = svmmla (z1, z4, z5))