1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
2
3 #include "test_sve_acle.h"
4
5 /*
6 ** divr_s32_m_tied1:
7 ** sdivr z0\.s, p0/m, z0\.s, z1\.s
8 ** ret
9 */
10 TEST_UNIFORM_Z (divr_s32_m_tied1, svint32_t,
11 z0 = svdivr_s32_m (p0, z0, z1),
12 z0 = svdivr_m (p0, z0, z1))
13
14 /*
15 ** divr_s32_m_tied2:
16 ** mov (z[0-9]+)\.d, z0\.d
17 ** movprfx z0, z1
18 ** sdivr z0\.s, p0/m, z0\.s, \1\.s
19 ** ret
20 */
21 TEST_UNIFORM_Z (divr_s32_m_tied2, svint32_t,
22 z0 = svdivr_s32_m (p0, z1, z0),
23 z0 = svdivr_m (p0, z1, z0))
24
25 /*
26 ** divr_s32_m_untied:
27 ** movprfx z0, z1
28 ** sdivr z0\.s, p0/m, z0\.s, z2\.s
29 ** ret
30 */
31 TEST_UNIFORM_Z (divr_s32_m_untied, svint32_t,
32 z0 = svdivr_s32_m (p0, z1, z2),
33 z0 = svdivr_m (p0, z1, z2))
34
35 /*
36 ** divr_w0_s32_m_tied1:
37 ** mov (z[0-9]+\.s), w0
38 ** sdivr z0\.s, p0/m, z0\.s, \1
39 ** ret
40 */
41 TEST_UNIFORM_ZX (divr_w0_s32_m_tied1, svint32_t, int32_t,
42 z0 = svdivr_n_s32_m (p0, z0, x0),
43 z0 = svdivr_m (p0, z0, x0))
44
45 /*
46 ** divr_w0_s32_m_untied:
47 ** mov (z[0-9]+\.s), w0
48 ** movprfx z0, z1
49 ** sdivr z0\.s, p0/m, z0\.s, \1
50 ** ret
51 */
52 TEST_UNIFORM_ZX (divr_w0_s32_m_untied, svint32_t, int32_t,
53 z0 = svdivr_n_s32_m (p0, z1, x0),
54 z0 = svdivr_m (p0, z1, x0))
55
56 /*
57 ** divr_2_s32_m_tied1:
58 ** mov (z[0-9]+\.s), #2
59 ** sdivr z0\.s, p0/m, z0\.s, \1
60 ** ret
61 */
62 TEST_UNIFORM_Z (divr_2_s32_m_tied1, svint32_t,
63 z0 = svdivr_n_s32_m (p0, z0, 2),
64 z0 = svdivr_m (p0, z0, 2))
65
66 /*
67 ** divr_2_s32_m_untied: { xfail *-*-* }
68 ** mov (z[0-9]+\.s), #2
69 ** movprfx z0, z1
70 ** sdivr z0\.s, p0/m, z0\.s, \1
71 ** ret
72 */
73 TEST_UNIFORM_Z (divr_2_s32_m_untied, svint32_t,
74 z0 = svdivr_n_s32_m (p0, z1, 2),
75 z0 = svdivr_m (p0, z1, 2))
76
77 /*
78 ** divr_m1_s32_m:
79 ** mov (z[0-9]+)\.b, #-1
80 ** sdivr z0\.s, p0/m, z0\.s, \1\.s
81 ** ret
82 */
83 TEST_UNIFORM_Z (divr_m1_s32_m, svint32_t,
84 z0 = svdivr_n_s32_m (p0, z0, -1),
85 z0 = svdivr_m (p0, z0, -1))
86
87 /*
88 ** divr_s32_z_tied1:
89 ** movprfx z0\.s, p0/z, z0\.s
90 ** sdivr z0\.s, p0/m, z0\.s, z1\.s
91 ** ret
92 */
93 TEST_UNIFORM_Z (divr_s32_z_tied1, svint32_t,
94 z0 = svdivr_s32_z (p0, z0, z1),
95 z0 = svdivr_z (p0, z0, z1))
96
97 /*
98 ** divr_s32_z_tied2:
99 ** movprfx z0\.s, p0/z, z0\.s
100 ** sdiv z0\.s, p0/m, z0\.s, z1\.s
101 ** ret
102 */
103 TEST_UNIFORM_Z (divr_s32_z_tied2, svint32_t,
104 z0 = svdivr_s32_z (p0, z1, z0),
105 z0 = svdivr_z (p0, z1, z0))
106
107 /*
108 ** divr_s32_z_untied:
109 ** (
110 ** movprfx z0\.s, p0/z, z1\.s
111 ** sdivr z0\.s, p0/m, z0\.s, z2\.s
112 ** |
113 ** movprfx z0\.s, p0/z, z2\.s
114 ** sdiv z0\.s, p0/m, z0\.s, z1\.s
115 ** )
116 ** ret
117 */
118 TEST_UNIFORM_Z (divr_s32_z_untied, svint32_t,
119 z0 = svdivr_s32_z (p0, z1, z2),
120 z0 = svdivr_z (p0, z1, z2))
121
122 /*
123 ** divr_w0_s32_z_tied1:
124 ** mov (z[0-9]+\.s), w0
125 ** movprfx z0\.s, p0/z, z0\.s
126 ** sdivr z0\.s, p0/m, z0\.s, \1
127 ** ret
128 */
129 TEST_UNIFORM_ZX (divr_w0_s32_z_tied1, svint32_t, int32_t,
130 z0 = svdivr_n_s32_z (p0, z0, x0),
131 z0 = svdivr_z (p0, z0, x0))
132
133 /*
134 ** divr_w0_s32_z_untied:
135 ** mov (z[0-9]+\.s), w0
136 ** (
137 ** movprfx z0\.s, p0/z, z1\.s
138 ** sdivr z0\.s, p0/m, z0\.s, \1
139 ** |
140 ** movprfx z0\.s, p0/z, \1
141 ** sdiv z0\.s, p0/m, z0\.s, z1\.s
142 ** )
143 ** ret
144 */
145 TEST_UNIFORM_ZX (divr_w0_s32_z_untied, svint32_t, int32_t,
146 z0 = svdivr_n_s32_z (p0, z1, x0),
147 z0 = svdivr_z (p0, z1, x0))
148
149 /*
150 ** divr_2_s32_z_tied1:
151 ** mov (z[0-9]+\.s), #2
152 ** movprfx z0\.s, p0/z, z0\.s
153 ** sdivr z0\.s, p0/m, z0\.s, \1
154 ** ret
155 */
156 TEST_UNIFORM_Z (divr_2_s32_z_tied1, svint32_t,
157 z0 = svdivr_n_s32_z (p0, z0, 2),
158 z0 = svdivr_z (p0, z0, 2))
159
160 /*
161 ** divr_2_s32_z_untied:
162 ** mov (z[0-9]+\.s), #2
163 ** (
164 ** movprfx z0\.s, p0/z, z1\.s
165 ** sdivr z0\.s, p0/m, z0\.s, \1
166 ** |
167 ** movprfx z0\.s, p0/z, \1
168 ** sdiv z0\.s, p0/m, z0\.s, z1\.s
169 ** )
170 ** ret
171 */
172 TEST_UNIFORM_Z (divr_2_s32_z_untied, svint32_t,
173 z0 = svdivr_n_s32_z (p0, z1, 2),
174 z0 = svdivr_z (p0, z1, 2))
175
176 /*
177 ** divr_s32_x_tied1:
178 ** sdivr z0\.s, p0/m, z0\.s, z1\.s
179 ** ret
180 */
181 TEST_UNIFORM_Z (divr_s32_x_tied1, svint32_t,
182 z0 = svdivr_s32_x (p0, z0, z1),
183 z0 = svdivr_x (p0, z0, z1))
184
185 /*
186 ** divr_s32_x_tied2:
187 ** sdiv z0\.s, p0/m, z0\.s, z1\.s
188 ** ret
189 */
190 TEST_UNIFORM_Z (divr_s32_x_tied2, svint32_t,
191 z0 = svdivr_s32_x (p0, z1, z0),
192 z0 = svdivr_x (p0, z1, z0))
193
194 /*
195 ** divr_s32_x_untied:
196 ** (
197 ** movprfx z0, z1
198 ** sdivr z0\.s, p0/m, z0\.s, z2\.s
199 ** |
200 ** movprfx z0, z2
201 ** sdiv z0\.s, p0/m, z0\.s, z1\.s
202 ** )
203 ** ret
204 */
205 TEST_UNIFORM_Z (divr_s32_x_untied, svint32_t,
206 z0 = svdivr_s32_x (p0, z1, z2),
207 z0 = svdivr_x (p0, z1, z2))
208
209 /*
210 ** divr_w0_s32_x_tied1:
211 ** mov (z[0-9]+\.s), w0
212 ** sdivr z0\.s, p0/m, z0\.s, \1
213 ** ret
214 */
215 TEST_UNIFORM_ZX (divr_w0_s32_x_tied1, svint32_t, int32_t,
216 z0 = svdivr_n_s32_x (p0, z0, x0),
217 z0 = svdivr_x (p0, z0, x0))
218
219 /*
220 ** divr_w0_s32_x_untied:
221 ** mov z0\.s, w0
222 ** sdiv z0\.s, p0/m, z0\.s, z1\.s
223 ** ret
224 */
225 TEST_UNIFORM_ZX (divr_w0_s32_x_untied, svint32_t, int32_t,
226 z0 = svdivr_n_s32_x (p0, z1, x0),
227 z0 = svdivr_x (p0, z1, x0))
228
229 /*
230 ** divr_2_s32_x_tied1:
231 ** mov (z[0-9]+\.s), #2
232 ** sdivr z0\.s, p0/m, z0\.s, \1
233 ** ret
234 */
235 TEST_UNIFORM_Z (divr_2_s32_x_tied1, svint32_t,
236 z0 = svdivr_n_s32_x (p0, z0, 2),
237 z0 = svdivr_x (p0, z0, 2))
238
239 /*
240 ** divr_2_s32_x_untied:
241 ** mov z0\.s, #2
242 ** sdiv z0\.s, p0/m, z0\.s, z1\.s
243 ** ret
244 */
245 TEST_UNIFORM_Z (divr_2_s32_x_untied, svint32_t,
246 z0 = svdivr_n_s32_x (p0, z1, 2),
247 z0 = svdivr_x (p0, z1, 2))