1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
2
3 #include "test_sve_acle.h"
4
5 /*
6 ** cntw_pow2:
7 ** cntw x0, pow2
8 ** ret
9 */
10 PROTO (cntw_pow2, uint64_t, ()) { return svcntw_pat (SV_POW2); }
11
12 /*
13 ** cntw_vl1:
14 ** mov x0, #?1
15 ** ret
16 */
17 PROTO (cntw_vl1, uint64_t, ()) { return svcntw_pat (SV_VL1); }
18
19 /*
20 ** cntw_vl2:
21 ** mov x0, #?2
22 ** ret
23 */
24 PROTO (cntw_vl2, uint64_t, ()) { return svcntw_pat (SV_VL2); }
25
26 /*
27 ** cntw_vl3:
28 ** mov x0, #?3
29 ** ret
30 */
31 PROTO (cntw_vl3, uint64_t, ()) { return svcntw_pat (SV_VL3); }
32
33 /*
34 ** cntw_vl4:
35 ** mov x0, #?4
36 ** ret
37 */
38 PROTO (cntw_vl4, uint64_t, ()) { return svcntw_pat (SV_VL4); }
39
40 /*
41 ** cntw_vl5:
42 ** cntw x0, vl5
43 ** ret
44 */
45 PROTO (cntw_vl5, uint64_t, ()) { return svcntw_pat (SV_VL5); }
46
47 /*
48 ** cntw_vl6:
49 ** cntw x0, vl6
50 ** ret
51 */
52 PROTO (cntw_vl6, uint64_t, ()) { return svcntw_pat (SV_VL6); }
53
54 /*
55 ** cntw_vl7:
56 ** cntw x0, vl7
57 ** ret
58 */
59 PROTO (cntw_vl7, uint64_t, ()) { return svcntw_pat (SV_VL7); }
60
61 /*
62 ** cntw_vl8:
63 ** cntw x0, vl8
64 ** ret
65 */
66 PROTO (cntw_vl8, uint64_t, ()) { return svcntw_pat (SV_VL8); }
67
68 /*
69 ** cntw_vl16:
70 ** cntw x0, vl16
71 ** ret
72 */
73 PROTO (cntw_vl16, uint64_t, ()) { return svcntw_pat (SV_VL16); }
74
75 /*
76 ** cntw_vl32:
77 ** cntw x0, vl32
78 ** ret
79 */
80 PROTO (cntw_vl32, uint64_t, ()) { return svcntw_pat (SV_VL32); }
81
82 /*
83 ** cntw_vl64:
84 ** cntw x0, vl64
85 ** ret
86 */
87 PROTO (cntw_vl64, uint64_t, ()) { return svcntw_pat (SV_VL64); }
88
89 /*
90 ** cntw_vl128:
91 ** cntw x0, vl128
92 ** ret
93 */
94 PROTO (cntw_vl128, uint64_t, ()) { return svcntw_pat (SV_VL128); }
95
96 /*
97 ** cntw_vl256:
98 ** cntw x0, vl256
99 ** ret
100 */
101 PROTO (cntw_vl256, uint64_t, ()) { return svcntw_pat (SV_VL256); }
102
103 /*
104 ** cntw_mul3:
105 ** cntw x0, mul3
106 ** ret
107 */
108 PROTO (cntw_mul3, uint64_t, ()) { return svcntw_pat (SV_MUL3); }
109
110 /*
111 ** cntw_mul4:
112 ** cntw x0, mul4
113 ** ret
114 */
115 PROTO (cntw_mul4, uint64_t, ()) { return svcntw_pat (SV_MUL4); }
116
117 /*
118 ** cntw_all:
119 ** cntw x0
120 ** ret
121 */
122 PROTO (cntw_all, uint64_t, ()) { return svcntw_pat (SV_ALL); }
123
124 /*
125 ** incw_32_pow2:
126 ** incw x0, pow2
127 ** ret
128 */
129 PROTO (incw_32_pow2, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_POW2); }
130
131 /*
132 ** incw_32_vl1:
133 ** add w0, w0, #?1
134 ** ret
135 */
136 PROTO (incw_32_vl1, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL1); }
137
138 /*
139 ** incw_32_vl2:
140 ** add w0, w0, #?2
141 ** ret
142 */
143 PROTO (incw_32_vl2, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL2); }
144
145 /*
146 ** incw_32_vl3:
147 ** add w0, w0, #?3
148 ** ret
149 */
150 PROTO (incw_32_vl3, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL3); }
151
152 /*
153 ** incw_32_vl4:
154 ** add w0, w0, #?4
155 ** ret
156 */
157 PROTO (incw_32_vl4, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL4); }
158
159 /*
160 ** incw_32_vl5:
161 ** incw x0, vl5
162 ** ret
163 */
164 PROTO (incw_32_vl5, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL5); }
165
166 /*
167 ** incw_32_vl6:
168 ** incw x0, vl6
169 ** ret
170 */
171 PROTO (incw_32_vl6, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL6); }
172
173 /*
174 ** incw_32_vl7:
175 ** incw x0, vl7
176 ** ret
177 */
178 PROTO (incw_32_vl7, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL7); }
179
180 /*
181 ** incw_32_vl8:
182 ** incw x0, vl8
183 ** ret
184 */
185 PROTO (incw_32_vl8, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL8); }
186
187 /*
188 ** incw_32_vl16:
189 ** incw x0, vl16
190 ** ret
191 */
192 PROTO (incw_32_vl16, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL16); }
193
194 /*
195 ** incw_32_vl32:
196 ** incw x0, vl32
197 ** ret
198 */
199 PROTO (incw_32_vl32, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL32); }
200
201 /*
202 ** incw_32_vl64:
203 ** incw x0, vl64
204 ** ret
205 */
206 PROTO (incw_32_vl64, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL64); }
207
208 /*
209 ** incw_32_vl128:
210 ** incw x0, vl128
211 ** ret
212 */
213 PROTO (incw_32_vl128, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL128); }
214
215 /*
216 ** incw_32_vl256:
217 ** incw x0, vl256
218 ** ret
219 */
220 PROTO (incw_32_vl256, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_VL256); }
221
222 /*
223 ** incw_32_mul3:
224 ** incw x0, mul3
225 ** ret
226 */
227 PROTO (incw_32_mul3, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_MUL3); }
228
229 /*
230 ** incw_32_mul4:
231 ** incw x0, mul4
232 ** ret
233 */
234 PROTO (incw_32_mul4, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_MUL4); }
235
236 /*
237 ** incw_32_all:
238 ** incw x0
239 ** ret
240 */
241 PROTO (incw_32_all, uint32_t, (uint32_t w0)) { return w0 + svcntw_pat (SV_ALL); }
242
243 /*
244 ** incw_64_pow2:
245 ** incw x0, pow2
246 ** ret
247 */
248 PROTO (incw_64_pow2, uint64_t, (uint64_t x0)) { return x0 + svcntw_pat (SV_POW2); }
249
250 /*
251 ** incw_64_all:
252 ** incw x0
253 ** ret
254 */
255 PROTO (incw_64_all, uint64_t, (uint64_t x0)) { return x0 + svcntw_pat (SV_ALL); }
256
257 /*
258 ** decw_32_pow2:
259 ** decw x0, pow2
260 ** ret
261 */
262 PROTO (decw_32_pow2, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_POW2); }
263
264 /*
265 ** decw_32_vl1:
266 ** sub w0, w0, #?1
267 ** ret
268 */
269 PROTO (decw_32_vl1, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL1); }
270
271 /*
272 ** decw_32_vl2:
273 ** sub w0, w0, #?2
274 ** ret
275 */
276 PROTO (decw_32_vl2, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL2); }
277
278 /*
279 ** decw_32_vl3:
280 ** sub w0, w0, #?3
281 ** ret
282 */
283 PROTO (decw_32_vl3, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL3); }
284
285 /*
286 ** decw_32_vl4:
287 ** sub w0, w0, #?4
288 ** ret
289 */
290 PROTO (decw_32_vl4, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL4); }
291
292 /*
293 ** decw_32_vl5:
294 ** decw x0, vl5
295 ** ret
296 */
297 PROTO (decw_32_vl5, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL5); }
298
299 /*
300 ** decw_32_vl6:
301 ** decw x0, vl6
302 ** ret
303 */
304 PROTO (decw_32_vl6, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL6); }
305
306 /*
307 ** decw_32_vl7:
308 ** decw x0, vl7
309 ** ret
310 */
311 PROTO (decw_32_vl7, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL7); }
312
313 /*
314 ** decw_32_vl8:
315 ** decw x0, vl8
316 ** ret
317 */
318 PROTO (decw_32_vl8, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL8); }
319
320 /*
321 ** decw_32_vl16:
322 ** decw x0, vl16
323 ** ret
324 */
325 PROTO (decw_32_vl16, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL16); }
326
327 /*
328 ** decw_32_vl32:
329 ** decw x0, vl32
330 ** ret
331 */
332 PROTO (decw_32_vl32, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL32); }
333
334 /*
335 ** decw_32_vl64:
336 ** decw x0, vl64
337 ** ret
338 */
339 PROTO (decw_32_vl64, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL64); }
340
341 /*
342 ** decw_32_vl128:
343 ** decw x0, vl128
344 ** ret
345 */
346 PROTO (decw_32_vl128, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL128); }
347
348 /*
349 ** decw_32_vl256:
350 ** decw x0, vl256
351 ** ret
352 */
353 PROTO (decw_32_vl256, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_VL256); }
354
355 /*
356 ** decw_32_mul3:
357 ** decw x0, mul3
358 ** ret
359 */
360 PROTO (decw_32_mul3, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_MUL3); }
361
362 /*
363 ** decw_32_mul4:
364 ** decw x0, mul4
365 ** ret
366 */
367 PROTO (decw_32_mul4, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_MUL4); }
368
369 /*
370 ** decw_32_all:
371 ** decw x0
372 ** ret
373 */
374 PROTO (decw_32_all, uint32_t, (uint32_t w0)) { return w0 - svcntw_pat (SV_ALL); }
375
376 /*
377 ** decw_64_pow2:
378 ** decw x0, pow2
379 ** ret
380 */
381 PROTO (decw_64_pow2, uint64_t, (uint64_t x0)) { return x0 - svcntw_pat (SV_POW2); }
382
383 /*
384 ** decw_64_all:
385 ** decw x0
386 ** ret
387 */
388 PROTO (decw_64_all, uint64_t, (uint64_t x0)) { return x0 - svcntw_pat (SV_ALL); }
389
390 /*
391 ** incw_s32_pow2_z0:
392 ** incw z0\.s, pow2
393 ** ret
394 */
395 TEST_UNIFORM_Z (incw_s32_pow2_z0, svint32_t,
396 z0 = svadd_n_s32_x (svptrue_b32 (), z0, svcntw_pat (SV_POW2)),
397 z0 = svadd_x (svptrue_b32 (), z0, svcntw_pat (SV_POW2)));
398
399 /*
400 ** incw_s32_pow2_z1:
401 ** movprfx z0, z1
402 ** incw z0\.s, pow2
403 ** ret
404 */
405 TEST_UNIFORM_Z (incw_s32_pow2_z1, svint32_t,
406 z0 = svadd_n_s32_x (svptrue_b32 (), z1, svcntw_pat (SV_POW2)),
407 z0 = svadd_x (svptrue_b32 (), z1, svcntw_pat (SV_POW2)));
408
409 /*
410 ** decw_s32_pow2_z0:
411 ** decw z0\.s, pow2
412 ** ret
413 */
414 TEST_UNIFORM_Z (decw_s32_pow2_z0, svint32_t,
415 z0 = svsub_n_s32_x (svptrue_b32 (), z0, svcntw_pat (SV_POW2)),
416 z0 = svsub_x (svptrue_b32 (), z0, svcntw_pat (SV_POW2)));
417
418 /*
419 ** decw_s32_pow2_z1:
420 ** movprfx z0, z1
421 ** decw z0\.s, pow2
422 ** ret
423 */
424 TEST_UNIFORM_Z (decw_s32_pow2_z1, svint32_t,
425 z0 = svsub_n_s32_x (svptrue_b32 (), z1, svcntw_pat (SV_POW2)),
426 z0 = svsub_x (svptrue_b32 (), z1, svcntw_pat (SV_POW2)));