1  /* Test the vqdmull_high_laneq_s16 AArch64 SIMD intrinsic.  */
       2  
       3  /* { dg-do compile } */
       4  /* { dg-options "-save-temps -O3 -fno-inline" } */
       5  
       6  #include "arm_neon.h"
       7  
       8  int32x4_t
       9  t_vqdmull_high_laneq_s16 (int16x8_t a, int16x8_t b)
      10  {
      11    return vqdmull_high_laneq_s16 (a, b, 0);
      12  }
      13  
      14  /* { dg-final { scan-assembler-times "sqdmull2\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */