1  /* Test the vmulxs_lane_f32 AArch64 SIMD intrinsic.  */
       2  
       3  /* { dg-do run } */
       4  /* { dg-options "-save-temps -O3" } */
       5  
       6  #include "arm_neon.h"
       7  
       8  extern void abort (void);
       9  
      10  float32_t __attribute__ ((noinline))
      11  test_vmulxs_lane_f32_lane0 (float32_t vec1_1, float32x2_t vec1_2)
      12  {
      13    return vmulxs_lane_f32 (vec1_1, vec1_2, 0);
      14  }
      15  
      16  float32_t __attribute__ ((noinline))
      17  test_vmulxs_lane_f32_lane1 (float32_t vec1_1, float32x2_t vec1_2)
      18  {
      19    return vmulxs_lane_f32 (vec1_1, vec1_2, 1);
      20  }
      21  
      22  #define PASS_ARRAY(...) {__VA_ARGS__}
      23  
      24  #define SETUP_VEC(V1_D, V2_D, EXP1, EXP2, I)				\
      25    void set_and_test_case##I ()						\
      26    {									\
      27      float32_t vec1 = V1_D;						\
      28      float32_t vec2_data[] =  V2_D;					\
      29      float32x2_t vec2 = vld1_f32 (vec2_data);				\
      30      float32_t expected_lane0 = EXP1;					\
      31      float32_t expected_lane1 = EXP2;					\
      32      float32_t actual_lane0 = test_vmulxs_lane_f32_lane0 (vec1, vec2);	\
      33      if (actual_lane0 != expected_lane0)					\
      34        abort ();								\
      35      float32_t actual_lane1 = test_vmulxs_lane_f32_lane1 (vec1, vec2);	\
      36      if (actual_lane1 != expected_lane1)					\
      37        abort ();								\
      38    }									\
      39  
      40  float32_t v1 = 3.14159265359;
      41  float32_t v2 = 1.383894;
      42  
      43  float32_t v4 = 0.0;
      44  float32_t v5 = -0.0;
      45  float32_t v6 = __builtin_huge_valf ();
      46  float32_t v7 = -__builtin_huge_valf ();
      47  
      48  SETUP_VEC (v1, PASS_ARRAY (v1, v2), v1*v1, v1*v2, 1)
      49  SETUP_VEC (v4, PASS_ARRAY (v6, v7), 2.0, -2.0, 2)
      50  SETUP_VEC (v5, PASS_ARRAY (v6, v7), -2.0, 2.0, 3)
      51  
      52  int
      53  main (void)
      54  {
      55    set_and_test_case1 ();
      56    set_and_test_case2 ();
      57    set_and_test_case3 ();
      58    return 0;
      59  }
      60  /* { dg-final { scan-assembler-times "fmulx\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]\n" 1 } } */
      61  /* { dg-final { scan-assembler-times "fmulx\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[1\\\]\n" 1 } } */