1  /* Test the vmulxd_laneq_f64 AArch64 SIMD intrinsic.  */
       2  
       3  /* { dg-do run } */
       4  /* { dg-options "-save-temps -O3" } */
       5  
       6  #include "arm_neon.h"
       7  
       8  extern void abort (void);
       9  
      10  float64_t __attribute__ ((noinline))
      11  test_vmulxd_laneq_f64_lane0 (float64_t vec1_1, float64x2_t vec1_2)
      12  {
      13    return vmulxd_laneq_f64 (vec1_1, vec1_2, 0);
      14  }
      15  
      16  float64_t __attribute__ ((noinline))
      17  test_vmulxd_laneq_f64_lane1 (float64_t vec1_1, float64x2_t vec1_2)
      18  {
      19    return vmulxd_laneq_f64 (vec1_1, vec1_2, 1);
      20  }
      21  
      22  #define PASS_ARRAY(...) {__VA_ARGS__}
      23  
      24  #define SETUP_VEC(V1_D, V2_D, EXP1, EXP2, I)				\
      25    void set_and_test_case##I ()						\
      26    {									\
      27      float64_t vec1 = V1_D;						\
      28      float64_t vec2_data[] = V2_D;					\
      29      float64x2_t vec2 = vld1q_f64 (vec2_data);				\
      30      float64_t expected_lane0 = EXP1;					\
      31      float64_t expected_lane1 = EXP2;					\
      32      float64_t actual_lane0 = test_vmulxd_laneq_f64_lane0 (vec1, vec2);	\
      33      if (actual_lane0 != expected_lane0)					\
      34        abort ();								\
      35      float64_t actual_lane1 = test_vmulxd_laneq_f64_lane1 (vec1, vec2);	\
      36      if (actual_lane1 != expected_lane1)					\
      37        abort ();								\
      38    }									\
      39  
      40  float64_t v1 = 3.14159265359;
      41  float64_t v2 = 1.383894;
      42  float64_t v3 = -2.71828;
      43  
      44  float64_t v4 = 0.0;
      45  float64_t v5 = -0.0;
      46  float64_t v6 = __builtin_huge_val ();
      47  float64_t v7 = -__builtin_huge_val ();
      48  
      49  SETUP_VEC (v1, PASS_ARRAY (v2, v3), v1*v2, v1*v3, 1)
      50  SETUP_VEC (v4, PASS_ARRAY (v6, v7), 2.0, -2.0, 2)
      51  SETUP_VEC (v5, PASS_ARRAY (v6, v7), -2.0, 2.0, 3)
      52  
      53  int
      54  main (void)
      55  {
      56    set_and_test_case1 ();
      57    set_and_test_case2 ();
      58    set_and_test_case3 ();
      59    return 0;
      60  }
      61  /* { dg-final { scan-assembler-times "fmulx\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]\n" 1 } } */
      62  /* { dg-final { scan-assembler-times "fmulx\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[dD\]\\\[1\\\]\n" 1 } } */