1  /* Test the vmulx_laneq_f64 AArch64 SIMD intrinsic.  */
       2  
       3  /* { dg-do run } */
       4  /* { dg-options "-save-temps -O3" } */
       5  
       6  #include "arm_neon.h"
       7  
       8  extern void abort (void);
       9  
      10  float64x1_t __attribute__ ((noinline))
      11  test_vmulx_laneq_f64_lane0 (float64x1_t vec1_1, float64x2_t vec1_2)
      12  {
      13    return vmulx_laneq_f64 (vec1_1, vec1_2, 0);
      14  }
      15  
      16  float64x1_t __attribute__ ((noinline))
      17  test_vmulx_laneq_f64_lane1 (float64x1_t vec1_1, float64x2_t vec1_2)
      18  {
      19    return vmulx_laneq_f64 (vec1_1, vec1_2, 1);
      20  }
      21  #define PASS_ARRAY(...) {__VA_ARGS__}
      22  
      23  #define SETUP_VEC(V1_D, V2_D, EXP1, EXP2, I)				\
      24    void set_and_test_case##I ()						\
      25    {									\
      26      float64_t vec1_data[] = V1_D;					\
      27      float64x1_t vec1 = vld1_f64 (vec1_data);				\
      28      float64_t vec2_data[] =  V2_D;					\
      29      float64x2_t vec2 = vld1q_f64 (vec2_data);				\
      30      float64_t expected_lane0[] = EXP1;					\
      31      float64_t expected_lane1[] = EXP2;					\
      32  									\
      33      float64x1_t actual_lane0_v =					\
      34        test_vmulx_laneq_f64_lane0 (vec1, vec2);				\
      35      float64_t actual_lane0[1];						\
      36      vst1_f64 (actual_lane0, actual_lane0_v);				\
      37      if (actual_lane0[0] != expected_lane0[0])				\
      38        abort ();								\
      39  									\
      40      float64x1_t actual_lane1_v =					\
      41        test_vmulx_laneq_f64_lane1 (vec1, vec2);				\
      42      float64_t actual_lane1[1];						\
      43      vst1_f64 (actual_lane1, actual_lane1_v);				\
      44      if (actual_lane1[0] != expected_lane1[0])				\
      45        abort ();								\
      46    }									\
      47  
      48  float64_t v1 = 3.14159265359;
      49  float64_t v2 = 1.383894;
      50  float64_t v3 = -2.71828;
      51  
      52  float64_t v4 = 0.0;
      53  float64_t v5 = __builtin_huge_val ();
      54  float64_t v6 = -__builtin_huge_val ();
      55  
      56  float64_t v7 = -0.0;
      57  float64_t v8 = __builtin_huge_val ();
      58  float64_t v9 = -__builtin_huge_val ();
      59  
      60  SETUP_VEC (PASS_ARRAY (v1), PASS_ARRAY (v2, v3), PASS_ARRAY (v1*v2),
      61  	   PASS_ARRAY (v1*v3), 1)
      62  SETUP_VEC (PASS_ARRAY (v4), PASS_ARRAY (v5, v6), PASS_ARRAY (2.0),
      63  	   PASS_ARRAY (-2.0), 2)
      64  SETUP_VEC (PASS_ARRAY (v7), PASS_ARRAY (v8, v9), PASS_ARRAY (-2.0),
      65  	   PASS_ARRAY (2.0), 3)
      66  
      67  int
      68  main (void)
      69  {
      70    set_and_test_case1 ();
      71    set_and_test_case2 ();
      72    set_and_test_case3 ();
      73    return 0;
      74  }
      75  /* { dg-final { scan-assembler-times "fmulx\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]\n" 1 } } */
      76  /* { dg-final { scan-assembler-times "fmulx\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[dD\]\\\[1\\\]\n" 1 } } */