1  /* Test the vmulx_f64 AArch64 SIMD intrinsic.  */
       2  
       3  /* { dg-do run } */
       4  /* { dg-options "-save-temps -O3" } */
       5  
       6  #include "arm_neon.h"
       7  #include "vmulx.x"
       8  
       9  extern void abort (void);
      10  
      11  int
      12  main (void)
      13  {
      14    float64_t v1 = 3.14159265359;
      15    float64_t v2 = 1.383894;
      16  
      17    /* Constant * constant, shouldn't generete fmulx or fmul, only fmov.  */
      18    SETUP_TEST_CASE_VEC (1, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      19  		       PASS_ARRAY (v1), PASS_ARRAY (v2), PASS_ARRAY (v1 * v2),
      20  		       1, f64, , , ,);
      21    SETUP_TEST_CASE_VEC (2, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      22  		       PASS_ARRAY (0.0), PASS_ARRAY (__builtin_huge_val ()),
      23  		       PASS_ARRAY (2.0), 1, f64, , , ,);
      24    SETUP_TEST_CASE_VEC (3, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      25  		       PASS_ARRAY (0.0), PASS_ARRAY (-__builtin_huge_val ()),
      26  		       PASS_ARRAY (-2.0), 1, f64, , , ,);
      27    SETUP_TEST_CASE_VEC (4, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      28  		       PASS_ARRAY (-0.0), PASS_ARRAY (__builtin_huge_val ()),
      29  		       PASS_ARRAY (-2.0), 1, f64, , , ,);
      30    SETUP_TEST_CASE_VEC (5, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      31  		       PASS_ARRAY (-0.0), PASS_ARRAY (-__builtin_huge_val ()),
      32  		       PASS_ARRAY (2.0), 1, f64, , , ,);
      33    /* Constant +/- 0 or +/- inf * non-constant should generate fmulx.  */
      34    SETUP_TEST_CASE_VEC (6, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      35  		       PASS_ARRAY (/* volatile.  */1.0),
      36  		       PASS_ARRAY (-__builtin_huge_val ()),
      37  		       PASS_ARRAY (-__builtin_huge_val ()), 1, f64, , , volatile
      38  		       ,);
      39    SETUP_TEST_CASE_VEC (7, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      40  		       PASS_ARRAY (/* volatile.  */1.0),
      41  		       PASS_ARRAY (__builtin_huge_val ()),
      42  		       PASS_ARRAY (__builtin_huge_val ()), 1, f64, , , volatile
      43  		       ,);
      44    SETUP_TEST_CASE_VEC (8, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      45  		       PASS_ARRAY (/* volatile.  */1.0), PASS_ARRAY (0.0),
      46  		       PASS_ARRAY (0.0), 1, f64, , , volatile,);
      47    SETUP_TEST_CASE_VEC (9, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      48  		       PASS_ARRAY (/* volatile.  */1.0), PASS_ARRAY (-0.0),
      49  		       PASS_ARRAY (-0.0), 1, f64, , , volatile,);
      50    /* Constant non +/- 0 or non +/- inf * non-constant should generate fmul.  */
      51    SETUP_TEST_CASE_VEC (10, vmulx_f64, float64_t, float64x1_t, float64x1_t,
      52  		       PASS_ARRAY (/* volatile.  */1.0), PASS_ARRAY (v1),
      53  		       PASS_ARRAY (v1), 1, f64, , , volatile,);
      54    return 0;
      55  }
      56  /* { dg-final { scan-assembler-times "fmulx\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" 4 } } */
      57  /* { dg-final { scan-assembler-times "fmul\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" 1 } } */
      58  /* { dg-final { scan-assembler-times "fmov\[ \t\]+\[dD\]\[0-9\]+, ?2.0e\\+0\n" 1 } } */
      59  /* { dg-final { scan-assembler-times "fmov\[ \t\]+\[dD\]\[0-9\]+, ?-2.0e\\+0\n" 1 } } */