1  /* { dg-do compile } */
       2  /* { dg-options "-O" } */
       3  
       4  /* These contain undefined behavior but may trigger edge cases in the
       5     vector shift patterns.  We don't check for their generation, we only
       6     care about not ICEing.  */
       7  
       8  typedef long long int Int64x1;
       9  typedef int Int32x1;
      10  
      11  #define force_simd_di(v) asm volatile ("mov %d0, %1.d[0]" : "=w"(v) : "w"(v) :)
      12  #define force_simd_si(v) asm volatile ("mov %s0, %1.s[0]" : "=w"(v) : "w"(v) :)
      13  
      14  Int64x1
      15  foo_di (Int64x1 b)
      16  {
      17    force_simd_di (b);
      18    b = b >> 63;
      19    force_simd_di (b);
      20    b = b >> 0;
      21    b += b >> 65; /* { dg-warning "right shift count >= width of type" } */
      22  
      23    return b;
      24  }
      25  
      26  Int32x1
      27  foo_si (Int32x1 b)
      28  {
      29    force_simd_si (b);
      30    b = b >> 31;
      31    force_simd_si (b);
      32    b = b >> 0;
      33    b += b >> 33; /* { dg-warning "right shift count >= width of type" } */
      34  
      35    return b;
      36  }