1 /* { dg-options "-O2 --save-temps" } */
2 /* { dg-do assemble } */
3
4
5 #define ROR(X,Y) ((X >> Y) | (X << (32 - Y)))
6
7 unsigned
8 ror1 (unsigned x)
9 {
10 /* { dg-final { scan-assembler "ror\tw\[0-9\]+, w\[0-9\]+, 3\n" } } */
11 return ROR (x, 3);
12 }
13
14 unsigned
15 ror2 (unsigned x)
16 {
17 /* { dg-final { scan-assembler "ror\tw\[0-9\]+, w\[0-9\]+, 17\n" } } */
18 return ROR (x, 17);
19 }
20
21 unsigned long
22 ror3 (unsigned x)
23 {
24 /* { dg-final { scan-assembler "ror\tw\[0-9\]+, w\[0-9\]+, 2\n" } } */
25 return (unsigned long) ROR (x, 2);
26 }
27
28 unsigned long
29 ror4 (unsigned x)
30 {
31 /* { dg-final { scan-assembler "ror\tw\[0-9\]+, w\[0-9\]+, 26\n" } } */
32 return (unsigned long) ROR (x, 26);
33 }
34
35 unsigned
36 and1 (unsigned x, unsigned y)
37 {
38 /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 13\n" } } */
39 return x & ROR (y, 13);
40 }
41
42 unsigned
43 and2 (unsigned x, unsigned y)
44 {
45 /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 23\n" } } */
46 return x & ROR (y, 23);
47 }
48
49 unsigned long
50 and3 (unsigned x, unsigned y)
51 {
52 /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 12\n" } } */
53 return x & (unsigned long) ROR (y, 12);
54 }
55
56 unsigned
57 bic1 (unsigned x, unsigned y)
58 {
59 /* { dg-final { scan-assembler "bic\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 11\n" } } */
60 return x & ~ROR (y, 11);
61 }
62
63 unsigned
64 bic2 (unsigned x, unsigned y)
65 {
66 /* { dg-final { scan-assembler "bic\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 17\n" } } */
67 return x & ~ROR (y, 17);
68 }
69
70 unsigned long
71 bic3 (unsigned x, unsigned y)
72 {
73 /* { dg-final { scan-assembler "bic\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 22\n" } } */
74 return (unsigned long) x & ~ROR (y, 22);
75 }
76
77 unsigned
78 orr1 (unsigned x, unsigned y)
79 {
80 /* { dg-final { scan-assembler "orr\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 5\n" } } */
81 return x | ROR (y, 5);
82 }
83
84 unsigned
85 orr2 (unsigned x, unsigned y)
86 {
87 /* { dg-final { scan-assembler "orr\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 25\n" } } */
88 return x | ROR (y, 25);
89 }
90
91 unsigned long
92 orr3 (unsigned x, unsigned y)
93 {
94 /* { dg-final { scan-assembler "orr\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 24\n" } } */
95 return (unsigned long)x | ROR (y, 24);
96 }
97
98 unsigned
99 orn1 (unsigned x, unsigned y)
100 {
101 /* { dg-final { scan-assembler "orn\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 3\n" } } */
102 return x | ~ROR (y, 3);
103 }
104
105 unsigned
106 orn2 (unsigned x, unsigned y)
107 {
108 /* { dg-final { scan-assembler "orn\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 30\n" } } */
109 return x | ~ROR (y, 30);
110 }
111
112 unsigned long
113 orn3 (unsigned x, unsigned y)
114 {
115 /* { dg-final { scan-assembler "orn\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 9\n" } } */
116 return x | (unsigned long) ~ROR (y, 9);
117 }
118
119 unsigned
120 eor1 (unsigned x, unsigned y)
121 {
122 /* { dg-final { scan-assembler "eor\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 9\n" } } */
123 return x ^ ROR (y, 9);
124 }
125
126 unsigned
127 eor2 (unsigned x, unsigned y)
128 {
129 /* { dg-final { scan-assembler "eor\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 31\n" } } */
130 return x ^ ROR (y, 31);
131 }
132
133 unsigned long
134 eor3 (unsigned x, unsigned y)
135 {
136 /* { dg-final { scan-assembler "eor\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 28\n" } } */
137 return (unsigned long) x ^ ROR (y, 28);
138 }
139
140 unsigned
141 eon1 (unsigned x, unsigned y)
142 {
143 /* { dg-final { scan-assembler "eon\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 1\n" } } */
144 return x ^ ~ROR (y, 1);
145 }
146
147 unsigned
148 eon2 (unsigned x, unsigned y)
149 {
150 /* { dg-final { scan-assembler "eon\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 18\n" } } */
151 return x ^ ~ROR (y, 18);
152 }
153
154 unsigned long
155 eon3 (unsigned x, unsigned y)
156 {
157 /* { dg-final { scan-assembler "eon\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, ror 19\n" } } */
158 return x ^ (unsigned long) ~ROR (y, 19);
159 }
160
161 int
162 tst1 (unsigned x, unsigned y)
163 {
164 /* { dg-final { scan-assembler "tst\tw\[0-9\]+, w\[0-9\]+, ror 8\n" } } */
165 return (x & ROR (y, 8)) == 0;
166 }
167
168 int
169 tst2 (unsigned x, unsigned y)
170 {
171 /* { dg-final { scan-assembler "tst\tw\[0-9\]+, w\[0-9\]+, ror 20\n" } } */
172 return (x & ROR (y, 20)) == 0;
173 }
174
175 int
176 tst3 (unsigned x, unsigned y)
177 {
178 /* { dg-final { scan-assembler "tst\tw\[0-9\]+, w\[0-9\]+, ror 20\n" } } */
179 return ((unsigned long)x & ROR (y, 20)) == 0;
180 }
181
182 int
183 bics1 (unsigned x, unsigned y)
184 {
185 /* { dg-final { scan-assembler "bics\twzr, w\[0-9\]+, w\[0-9\]+, ror 10\n" } } */
186 return (x & ~ROR (y, 10)) == 0;
187 }
188
189 int
190 bics2 (unsigned x, unsigned y)
191 {
192 /* { dg-final { scan-assembler "bics\twzr, w\[0-9\]+, w\[0-9\]+, ror 21\n" } } */
193 return (x & ~ROR (y, 21)) == 0;
194 }
195
196 int
197 bics3 (unsigned x, unsigned y)
198 {
199 /* { dg-final { scan-assembler "bics\twzr, w\[0-9\]+, w\[0-9\]+, ror 21\n" } } */
200 return (x & (unsigned long)~ROR (y, 21)) == 0;
201 }
202
203 /* { dg-final { scan-assembler-not "cmp" } } */
204 /* { dg-final { scan-assembler-not "mvn" } } */
205 /* { dg-final { scan-assembler-not "uxtw" } } */