1  /* PR target/70809.  */
       2  /* { dg-do compile } */
       3  /* { dg-options "-O2 -ftree-vectorize -ffp-contract=off -mtune=xgene1" } */
       4  
       5  /* Check that vector FMLS is not generated when contraction is disabled.  */
       6  
       7  void
       8  foo (float *__restrict__ __attribute__ ((aligned (16))) a,
       9       float *__restrict__ __attribute__ ((aligned (16))) x,
      10       float *__restrict__ __attribute__ ((aligned (16))) y,
      11       float *__restrict__ __attribute__ ((aligned (16))) z)
      12  {
      13    unsigned i = 0;
      14    for (i = 0; i < 256; i++)
      15      a[i] = x[i] - (y[i] * z[i]);
      16  }
      17  
      18  /* { dg-final { scan-assembler-not "fmls\tv.*" } } */