(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
movv3x16qi_1.c
       1  /* { dg-do assemble } */
       2  /* { dg-options "-O --save-temps" } */
       3  /* { dg-final { check-function-bodies "**" "" "" } } */
       4  
       5  #pragma GCC aarch64 "arm_neon.h"
       6  
       7  #pragma GCC target "+nosimd+fp"
       8  
       9  #define TEST_VECTOR(TYPE) \
      10    TYPE mov_##TYPE (TYPE a, TYPE b) { return b; } \
      11    TYPE load_##TYPE (TYPE *ptr) { return *ptr; } \
      12    void store_##TYPE (TYPE *ptr, TYPE a) { *ptr = a; }
      13  
      14  TEST_VECTOR (int8x16x3_t)
      15  TEST_VECTOR (int16x8x3_t)
      16  TEST_VECTOR (int32x4x3_t)
      17  TEST_VECTOR (int64x2x3_t)
      18  TEST_VECTOR (float16x8x3_t)
      19  TEST_VECTOR (bfloat16x8x3_t)
      20  TEST_VECTOR (float32x4x3_t)
      21  TEST_VECTOR (float64x2x3_t)
      22  
      23  /*
      24  ** mov_int8x16x3_t:
      25  **	sub	sp, sp, #48
      26  **	stp	q3, q4, \[sp\]
      27  **	str	q5, \[sp, #?32\]
      28  **	ldp	q0, q1, \[sp\]
      29  **	ldr	q2, \[sp, #?32\]
      30  **	add	sp, sp, #?48
      31  **	ret
      32  */
      33  /*
      34  ** load_int8x16x3_t:
      35  **	ldp	q0, q1, \[x0\]
      36  **	ldr	q2, \[x0, #?32\]
      37  **	ret
      38  */
      39  /*
      40  ** store_int8x16x3_t: { xfail *-*-* }
      41  **	stp	q0, q1, \[x0\]
      42  **	stp	q2, \[x0, #?32\]
      43  **	ret
      44  */