1  /* { dg-do assemble } */
       2  /* { dg-require-effective-target large_long_double } */
       3  /* { dg-options "-O -mtune=neoverse-v1 --save-temps" } */
       4  /* { dg-final { check-function-bodies "**" "" "" } } */
       5  
       6  #pragma GCC target "+nothing+nosimd+fp"
       7  
       8  /*
       9  ** fpr_to_fpr:
      10  **	sub	sp, sp, #16
      11  **	str	q1, \[sp\]
      12  **	ldr	q0, \[sp\]
      13  **	add	sp, sp, #?16
      14  **	ret
      15  */
      16  long double
      17  fpr_to_fpr (long double q0, long double q1)
      18  {
      19    return q1;
      20  }
      21  
      22  /*
      23  ** gpr_to_fpr:	{ target aarch64_little_endian }
      24  **	fmov	d0, x0
      25  **	fmov	v0.d\[1\], x1
      26  **	ret
      27  */
      28  /*
      29  ** gpr_to_fpr:	{ target aarch64_big_endian }
      30  **	fmov	d0, x1
      31  **	fmov	v0.d\[1\], x0
      32  **	ret
      33  */
      34  long double
      35  gpr_to_fpr ()
      36  {
      37    register long double x0 asm ("x0");
      38    asm volatile ("" : "=r" (x0));
      39    return x0;
      40  }
      41  
      42  /*
      43  ** zero_to_fpr:
      44  **	fmov	s0, wzr
      45  **	ret
      46  */
      47  long double
      48  zero_to_fpr ()
      49  {
      50    return 0;
      51  }
      52  
      53  /*
      54  ** fpr_to_gpr:	{ target aarch64_little_endian }
      55  ** (
      56  **	fmov	x0, d0
      57  **	fmov	x1, v0.d\[1\]
      58  ** |
      59  **	fmov	x1, v0.d\[1\]
      60  **	fmov	x0, d0
      61  ** )
      62  **	ret
      63  */
      64  /*
      65  ** fpr_to_gpr:	{ target aarch64_big_endian }
      66  ** (
      67  **	fmov	x1, d0
      68  **	fmov	x0, v0.d\[1\]
      69  ** |
      70  **	fmov	x0, v0.d\[1\]
      71  **	fmov	x1, d0
      72  ** )
      73  **	ret
      74  */
      75  void
      76  fpr_to_gpr (long double q0)
      77  {
      78    register long double x0 asm ("x0");
      79    x0 = q0;
      80    asm volatile ("" :: "r" (x0));
      81  }