1  /* { dg-do run } */
       2  /* { dg-options "-O3 --save-temps" } */
       3  
       4  #include <arm_neon.h>
       5  
       6  extern void abort (void);
       7  
       8  #define MAPs(size, xx) int##size##xx##_t
       9  #define MAPu(size, xx) uint##size##xx##_t
      10  
      11  
      12  #define TEST_VMLA(q, su, size, in1_lanes, in2_lanes)		\
      13  static void							\
      14  __attribute__((noipa,noinline))					\
      15  test_vmlaq_lane##q##_##su##size (MAP##su (size, ) * res,	\
      16  				 const MAP##su(size, ) *in1,	\
      17  				 const MAP##su(size, ) *in2)	\
      18  {								\
      19    MAP##su (size, x##in1_lanes) a = vld1q_##su##size (res);	\
      20    MAP##su (size, x##in1_lanes) b = vld1q_##su##size (in1);	\
      21    MAP##su (size, x##in2_lanes) c = vld1##q##_##su##size (in2);	\
      22    a = vmlaq_lane##q##_##su##size (a, b, c, 1);			\
      23    vst1q_##su##size (res, a);					\
      24  }
      25  
      26  #define BUILD_VARS(width, n_lanes, n_half_lanes)		\
      27  TEST_VMLA (, s, width, n_lanes, n_half_lanes)			\
      28  TEST_VMLA (q, s, width, n_lanes, n_lanes)			\
      29  TEST_VMLA (, u, width, n_lanes, n_half_lanes)			\
      30  TEST_VMLA (q, u, width, n_lanes, n_lanes)			\
      31  
      32  BUILD_VARS (32, 4, 2)
      33  BUILD_VARS (16, 8, 4)
      34  
      35  #define POOL4 {0, 1, 2, 3}
      36  #define POOL8 {0, 1, 2, 3, 4, 5, 6, 7}
      37  #define EMPTY4 {0, 0, 0, 0}
      38  #define EMPTY8 {0, 0, 0, 0, 0, 0, 0, 0}
      39  
      40  #define BUILD_TEST(su, size, lanes)				\
      41  static void							\
      42  test_##su##size (void)						\
      43  {								\
      44    int i;							\
      45    MAP##su (size,) pool[lanes] = POOL##lanes;			\
      46    MAP##su (size,) res[lanes] = EMPTY##lanes;			\
      47    MAP##su (size,) res2[lanes] = EMPTY##lanes;			\
      48  								\
      49    /* Forecfully avoid optimization.  */				\
      50    asm volatile ("" : : : "memory");				\
      51    test_vmlaq_lane_##su##size (res, pool, pool);			\
      52    for (i = 0; i < lanes; i++)					\
      53      if (res[i] != pool[i])					\
      54        abort ();							\
      55  								\
      56    /* Forecfully avoid optimization.  */				\
      57    asm volatile ("" : : : "memory");				\
      58    test_vmlaq_laneq_##su##size (res2, pool, pool);		\
      59    for (i = 0; i < lanes; i++)					\
      60      if (res2[i] != pool[i])					\
      61        abort ();							\
      62  }
      63  
      64  #undef BUILD_VARS
      65  #define BUILD_VARS(size, lanes)					\
      66  BUILD_TEST (s, size, lanes)					\
      67  BUILD_TEST (u, size, lanes)
      68  
      69  BUILD_VARS (32, 4)
      70  BUILD_VARS (16, 8)
      71  
      72  int
      73  main (int argc, char **argv)
      74  {
      75    test_s32 ();
      76    test_u32 ();
      77    test_s16 ();
      78    test_u16 ();
      79    return 0;
      80  }
      81  
      82  /* { dg-final { scan-assembler-times "mla\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.s\\\[\[0-9\]+\\\]" 4 } } */
      83  /* { dg-final { scan-assembler-times "mla\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.h\\\[\[0-9\]+\\\]" 4 } } */
      84