1  /* { dg-do compile } */
       2  /* { dg-options "-O2" } */
       3  
       4  // Hits *add_uxtdi_shift2 (*add_uxt<mode>_shift2).
       5  /*
       6  ** add1:
       7  ** 	add	x0, x0, w1, uxtw 3
       8  ** 	ret
       9  */
      10  unsigned long long *add1(unsigned long long *p, unsigned x)
      11  {
      12    return p + x;
      13  }
      14  
      15  // Hits *add_zero_extendsi_di (*add_<optab><ALLX:mode>_<GPI:mode>).
      16  /*
      17  ** add2:
      18  ** 	add	x0, x0, w1, uxtw
      19  ** 	ret
      20  */
      21  unsigned long long add2(unsigned long long x, unsigned y)
      22  {
      23    /* { dg-final { scan-assembler-times "add\tx0, x0, w1, uxtw" 1 { target ilp32 } } } */
      24    return x + y;
      25  }
      26  
      27  // Hits *add_extendsi_shft_di (*add_<optab><ALLX:mode>_shft_<GPI:mode>).
      28  /*
      29  ** add3:
      30  ** 	add	x0, x0, w1, sxtw 3
      31  ** 	ret
      32  */
      33  double *add3(double *p, int x)
      34  {
      35    return p + x;
      36  }
      37  
      38  // add1 and add3 should both generate this on ILP32:
      39  /* { dg-final { scan-assembler-times "add\tw0, w0, w1, lsl 3" 2 { target ilp32 } } } */
      40  
      41  // Hits *sub_zero_extendsi_di (*sub_<optab><ALLX:mode>_<GPI:mode>).
      42  /*
      43  ** sub1:
      44  ** 	sub	x0, x0, w1, uxtw
      45  ** 	ret
      46  */
      47  unsigned long long sub1(unsigned long long x, unsigned n)
      48  {
      49      /* { dg-final { scan-assembler-times "sub\tx0, x0, w1, uxtw" 1 { target ilp32 } } } */
      50      return x - n;
      51  }
      52  
      53  // Hits *sub_uxtdi_shift2 (*sub_uxt<mode>_shift2).
      54  /*
      55  ** sub2:
      56  ** 	sub	x0, x0, w1, uxtw 3
      57  ** 	ret
      58  */
      59  double *sub2(double *x, unsigned n)
      60  {
      61    return x - n;
      62  }
      63  
      64  // Hits *sub_extendsi_shft_di (*sub_<optab><ALLX:mode>_shft_<GPI:mode>).
      65  /*
      66  ** sub3:
      67  ** 	sub	x0, x0, w1, sxtw 3
      68  ** 	ret
      69  */
      70  double *sub3(double *p, int n)
      71  {
      72    return p - n;
      73  }
      74  
      75  // sub2 and sub3 should both generate this on ILP32:
      76  /* { dg-final { scan-assembler-times "sub\tw0, w0, w1, lsl 3" 2 { target ilp32 } } } */
      77  
      78  // Hits *adds_zero_extendsi_di (*adds_<optab><ALLX:mode>_<GPI:mode>).
      79  int adds1(unsigned long long x, unsigned y)
      80  {
      81    /* { dg-final { scan-assembler-times "adds\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, uxtw" 1 } } */
      82    unsigned long long l = x + y;
      83    return !!l;
      84  }
      85  
      86  // Hits *adds_extendsi_shift_di (*adds_<optab><ALLX:mode>_shift_<GPI:mode>).
      87  int adds2(long long x, int y)
      88  {
      89    /* { dg-final { scan-assembler-times "adds\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, sxtw 3" 1 } } */
      90    long long t = x + ((long long)y << 3);
      91    return !!t;
      92  }
      93  
      94  // Hits *subs_zero_extendsi_di (*subs_<optab><ALLX:mode>_<GPI:mode>).
      95  unsigned long long z;
      96  int subs1(unsigned long long x, unsigned y)
      97  {
      98    /* { dg-final { scan-assembler-times "subs\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, uxtw" 1 } } */
      99    unsigned long long t = x - y;
     100    z = t;
     101    return !!t;
     102  }
     103  
     104  // Hits *subs_extendsi_shift_di (*subs_<optab><ALLX:mode>_shift_<GPI:mode>).
     105  unsigned long long *w;
     106  int subs2(unsigned long long *x, int y)
     107  {
     108    /* { dg-final { scan-assembler-times "subs\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, sxtw 3" 1 { target lp64 } } } */
     109    /* { dg-final { scan-assembler-times "subs\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" 1 { target ilp32 } } } */
     110    unsigned long long *t = x - y;
     111    w = t;
     112    return !!t;
     113  }
     114  
     115  // Hits *cmp_swp_zero_extendsi_regdi (*cmp_swp_<optab><ALLX:mode>_reg<GPI:mode>).
     116  int cmp(unsigned long long x, unsigned y)
     117  {
     118    /* { dg-final { scan-assembler-times "cmp\tx\[0-9\]+, w\[0-9\]+, uxtw" 1 } } */
     119    return !!(x - y);
     120  }
     121  
     122  // Hits *cmp_swp_extendsi_shft_di (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>).
     123  int cmp2(unsigned long long x, int y)
     124  {
     125    /* { dg-final { scan-assembler-times "cmp\tx\[0-9\]+, w\[0-9\]+, sxtw 3" 1 } } */
     126    return x == ((unsigned long long)y << 3);
     127  }
     128  
     129  /* { dg-final { check-function-bodies "**" "" "" { target lp64 } } } */