1 /* { dg-do compile } */
2 /* { dg-options "-O2 -march=armv8-a+lse" } */
3
4 /* Test ARMv8.1-A LD<logic-op> instruction. */
5
6 #include "atomic-inst-ops.inc"
7
8 #define TEST TEST_ONE
9
10 #define LOAD_OR(FN, TY, MODEL) \
11 TY FNNAME (FN, TY) (TY* val, TY* foo) \
12 { \
13 return __atomic_fetch_or (val, foo, MODEL); \
14 }
15
16 #define LOAD_OR_NORETURN(FN, TY, MODEL) \
17 void FNNAME (FN, TY) (TY* val, TY* foo) \
18 { \
19 __atomic_fetch_or (val, foo, MODEL); \
20 }
21
22 #define LOAD_AND(FN, TY, MODEL) \
23 TY FNNAME (FN, TY) (TY* val, TY* foo) \
24 { \
25 return __atomic_fetch_and (val, foo, MODEL); \
26 }
27
28 #define LOAD_AND_NORETURN(FN, TY, MODEL) \
29 void FNNAME (FN, TY) (TY* val, TY* foo) \
30 { \
31 __atomic_fetch_and (val, foo, MODEL); \
32 }
33
34 #define LOAD_XOR(FN, TY, MODEL) \
35 TY FNNAME (FN, TY) (TY* val, TY* foo) \
36 { \
37 return __atomic_fetch_xor (val, foo, MODEL); \
38 }
39
40 #define LOAD_XOR_NORETURN(FN, TY, MODEL) \
41 void FNNAME (FN, TY) (TY* val, TY* foo) \
42 { \
43 __atomic_fetch_xor (val, foo, MODEL); \
44 }
45
46 #define OR_LOAD(FN, TY, MODEL) \
47 TY FNNAME (FN, TY) (TY* val, TY* foo) \
48 { \
49 return __atomic_or_fetch (val, foo, MODEL); \
50 }
51
52 #define OR_LOAD_NORETURN(FN, TY, MODEL) \
53 void FNNAME (FN, TY) (TY* val, TY* foo) \
54 { \
55 __atomic_or_fetch (val, foo, MODEL); \
56 }
57
58 #define AND_LOAD(FN, TY, MODEL) \
59 TY FNNAME (FN, TY) (TY* val, TY* foo) \
60 { \
61 return __atomic_and_fetch (val, foo, MODEL); \
62 }
63
64 #define AND_LOAD_NORETURN(FN, TY, MODEL) \
65 void FNNAME (FN, TY) (TY* val, TY* foo) \
66 { \
67 __atomic_and_fetch (val, foo, MODEL); \
68 }
69
70 #define XOR_LOAD(FN, TY, MODEL) \
71 TY FNNAME (FN, TY) (TY* val, TY* foo) \
72 { \
73 return __atomic_xor_fetch (val, foo, MODEL); \
74 }
75
76 #define XOR_LOAD_NORETURN(FN, TY, MODEL) \
77 void FNNAME (FN, TY) (TY* val, TY* foo) \
78 { \
79 __atomic_xor_fetch (val, foo, MODEL); \
80 }
81
82
83 TEST (load_or, LOAD_OR)
84 TEST (load_or_notreturn, LOAD_OR_NORETURN)
85
86 TEST (load_and, LOAD_AND)
87 TEST (load_and_notreturn, LOAD_AND_NORETURN)
88
89 TEST (load_xor, LOAD_XOR)
90 TEST (load_xor_notreturn, LOAD_XOR_NORETURN)
91
92 TEST (or_load, OR_LOAD)
93 TEST (or_load_notreturn, OR_LOAD_NORETURN)
94
95 TEST (and_load, AND_LOAD)
96 TEST (and_load_notreturn, AND_LOAD_NORETURN)
97
98 TEST (xor_load, XOR_LOAD)
99 TEST (xor_load_notreturn, XOR_LOAD_NORETURN)
100
101
102 /* Load-OR. */
103
104 /* { dg-final { scan-assembler-times "ldsetb\t" 8} } */
105 /* { dg-final { scan-assembler-times "ldsetab\t" 16} } */
106 /* { dg-final { scan-assembler-times "ldsetlb\t" 8} } */
107 /* { dg-final { scan-assembler-times "ldsetalb\t" 16} } */
108
109 /* { dg-final { scan-assembler-times "ldseth\t" 8} } */
110 /* { dg-final { scan-assembler-times "ldsetah\t" 16} } */
111 /* { dg-final { scan-assembler-times "ldsetlh\t" 8} } */
112 /* { dg-final { scan-assembler-times "ldsetalh\t" 16} } */
113
114 /* { dg-final { scan-assembler-times "ldset\t" 16} } */
115 /* { dg-final { scan-assembler-times "ldseta\t" 32} } */
116 /* { dg-final { scan-assembler-times "ldsetl\t" 16} } */
117 /* { dg-final { scan-assembler-times "ldsetal\t" 32} } */
118
119 /* Load-AND. */
120
121 /* { dg-final { scan-assembler-times "ldclrb\t" 8} } */
122 /* { dg-final { scan-assembler-times "ldclrab\t" 16} } */
123 /* { dg-final { scan-assembler-times "ldclrlb\t" 8} } */
124 /* { dg-final { scan-assembler-times "ldclralb\t" 16} } */
125
126 /* { dg-final { scan-assembler-times "ldclrh\t" 8} } */
127 /* { dg-final { scan-assembler-times "ldclrah\t" 16} } */
128 /* { dg-final { scan-assembler-times "ldclrlh\t" 8} } */
129 /* { dg-final { scan-assembler-times "ldclralh\t" 16} } */
130
131 /* { dg-final { scan-assembler-times "ldclr\t" 16} */
132 /* { dg-final { scan-assembler-times "ldclra\t" 32} } */
133 /* { dg-final { scan-assembler-times "ldclrl\t" 16} } */
134 /* { dg-final { scan-assembler-times "ldclral\t" 32} } */
135
136 /* Load-XOR. */
137
138 /* { dg-final { scan-assembler-times "ldeorb\t" 8} } */
139 /* { dg-final { scan-assembler-times "ldeorab\t" 16} } */
140 /* { dg-final { scan-assembler-times "ldeorlb\t" 8} } */
141 /* { dg-final { scan-assembler-times "ldeoralb\t" 16} } */
142
143 /* { dg-final { scan-assembler-times "ldeorh\t" 8} } */
144 /* { dg-final { scan-assembler-times "ldeorah\t" 16} } */
145 /* { dg-final { scan-assembler-times "ldeorlh\t" 8} } */
146 /* { dg-final { scan-assembler-times "ldeoralh\t" 16} } */
147
148 /* { dg-final { scan-assembler-times "ldeor\t" 16} */
149 /* { dg-final { scan-assembler-times "ldeora\t" 32} } */
150 /* { dg-final { scan-assembler-times "ldeorl\t" 16} } */
151 /* { dg-final { scan-assembler-times "ldeoral\t" 32} } */
152
153 /* { dg-final { scan-assembler-not "ldaxr\t" } } */
154 /* { dg-final { scan-assembler-not "stlxr\t" } } */
155 /* { dg-final { scan-assembler-not "dmb" } } */