(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
advsimd-intrinsics/
vsli_n.c
       1  #include <arm_neon.h>
       2  #include "arm-neon-ref.h"
       3  #include "compute-ref-data.h"
       4  
       5  #define INSN_NAME vsli
       6  #define TEST_MSG "VSLI_N"
       7  
       8  /* Extra tests for functions requiring corner cases tests.  */
       9  void vsli_extra(void);
      10  #define EXTRA_TESTS vsli_extra
      11  
      12  /* Expected results.  */
      13  VECT_VAR_DECL(expected,int,8,8) [] = { 0x20, 0x21, 0x22, 0x23,
      14  				       0x24, 0x25, 0x26, 0x27 };
      15  VECT_VAR_DECL(expected,int,16,4) [] = { 0xffe0, 0xffe1, 0xffe2, 0xffe3 };
      16  VECT_VAR_DECL(expected,int,32,2) [] = { 0x6, 0x7 };
      17  VECT_VAR_DECL(expected,int,64,1) [] = { 0x64fffffff0 };
      18  VECT_VAR_DECL(expected,uint,8,8) [] = { 0x50, 0x51, 0x52, 0x53,
      19  					0x50, 0x51, 0x52, 0x53 };
      20  VECT_VAR_DECL(expected,uint,16,4) [] = { 0x7bf0, 0x7bf1, 0x7bf2, 0x7bf3 };
      21  VECT_VAR_DECL(expected,uint,32,2) [] = { 0x3ffffff0, 0x3ffffff1 };
      22  VECT_VAR_DECL(expected,uint,64,1) [] = { 0x10 };
      23  VECT_VAR_DECL(expected,poly,8,8) [] = { 0x50, 0x51, 0x52, 0x53,
      24  					0x50, 0x51, 0x52, 0x53 };
      25  VECT_VAR_DECL(expected,poly,16,4) [] = { 0x7bf0, 0x7bf1, 0x7bf2, 0x7bf3 };
      26  VECT_VAR_DECL(expected,int,8,16) [] = { 0xd0, 0xd1, 0xd2, 0xd3,
      27  					0xd4, 0xd5, 0xd6, 0xd7,
      28  					0xd8, 0xd9, 0xda, 0xdb,
      29  					0xdc, 0xdd, 0xde, 0xdf };
      30  VECT_VAR_DECL(expected,int,16,8) [] = { 0xff60, 0xff61, 0xff62, 0xff63,
      31  					0xff64, 0xff65, 0xff66, 0xff67 };
      32  VECT_VAR_DECL(expected,int,32,4) [] = { 0xfe2ffff0, 0xfe2ffff1,
      33  					0xfe2ffff2, 0xfe2ffff3 };
      34  VECT_VAR_DECL(expected,int,64,2) [] = { 0x18fff0, 0x18fff1 };
      35  VECT_VAR_DECL(expected,uint,8,16) [] = { 0x60, 0x61, 0x62, 0x63,
      36  					 0x64, 0x65, 0x66, 0x67,
      37  					 0x60, 0x61, 0x62, 0x63,
      38  					 0x64, 0x65, 0x66, 0x67 };
      39  VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3ff0, 0x3ff1, 0x3ff2, 0x3ff3,
      40  					 0x3ff4, 0x3ff5, 0x3ff6, 0x3ff7 };
      41  VECT_VAR_DECL(expected,uint,32,4) [] = { 0x1bfffff0, 0x1bfffff1,
      42  					 0x1bfffff2, 0x1bfffff3 };
      43  VECT_VAR_DECL(expected,uint,64,2) [] = { 0x7ffffffffffff0, 0x7ffffffffffff1 };
      44  VECT_VAR_DECL(expected,poly,8,16) [] = { 0x60, 0x61, 0x62, 0x63,
      45  					 0x64, 0x65, 0x66, 0x67,
      46  					 0x60, 0x61, 0x62, 0x63,
      47  					 0x64, 0x65, 0x66, 0x67 };
      48  VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3ff0, 0x3ff1, 0x3ff2, 0x3ff3,
      49  					 0x3ff4, 0x3ff5, 0x3ff6, 0x3ff7 };
      50  
      51  /* Expected results with max shift amount.  */
      52  VECT_VAR_DECL(expected_max_shift,int,8,8) [] = { 0x70, 0x71, 0x72, 0x73,
      53  						 0x74, 0x75, 0x76, 0x77 };
      54  VECT_VAR_DECL(expected_max_shift,int,16,4) [] = { 0x7ff0, 0x7ff1,
      55  						  0x7ff2, 0x7ff3 };
      56  VECT_VAR_DECL(expected_max_shift,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
      57  VECT_VAR_DECL(expected_max_shift,int,64,1) [] = { 0x7ffffffffffffff0 };
      58  VECT_VAR_DECL(expected_max_shift,uint,8,8) [] = { 0x70, 0x71, 0x72, 0x73,
      59  						  0x74, 0x75, 0x76, 0x77 };
      60  VECT_VAR_DECL(expected_max_shift,uint,16,4) [] = { 0x7ff0, 0x7ff1,
      61  						   0x7ff2, 0x7ff3 };
      62  VECT_VAR_DECL(expected_max_shift,uint,32,2) [] = { 0x7ffffff0, 0x7ffffff1 };
      63  VECT_VAR_DECL(expected_max_shift,uint,64,1) [] = { 0x7ffffffffffffff0 };
      64  VECT_VAR_DECL(expected_max_shift,poly,8,8) [] = { 0x70, 0x71, 0x72, 0x73,
      65  						  0x74, 0x75, 0x76, 0x77 };
      66  VECT_VAR_DECL(expected_max_shift,poly,16,4) [] = { 0x7ff0, 0x7ff1,
      67  						   0x7ff2, 0x7ff3 };
      68  VECT_VAR_DECL(expected_max_shift,int,8,16) [] = { 0x70, 0x71, 0x72, 0x73,
      69  						  0x74, 0x75, 0x76, 0x77,
      70  						  0x78, 0x79, 0x7a, 0x7b,
      71  						  0x7c, 0x7d, 0x7e, 0x7f };
      72  VECT_VAR_DECL(expected_max_shift,int,16,8) [] = { 0x7ff0, 0x7ff1, 0x7ff2, 0x7ff3,
      73  						  0x7ff4, 0x7ff5, 0x7ff6, 0x7ff7 };
      74  VECT_VAR_DECL(expected_max_shift,int,32,4) [] = { 0x7ffffff0, 0x7ffffff1,
      75  						  0x7ffffff2, 0x7ffffff3 };
      76  VECT_VAR_DECL(expected_max_shift,int,64,2) [] = { 0x7ffffffffffffff0,
      77  						  0x7ffffffffffffff1 };
      78  VECT_VAR_DECL(expected_max_shift,uint,8,16) [] = { 0x70, 0x71, 0x72, 0x73,
      79  						   0x74, 0x75, 0x76, 0x77,
      80  						   0x78, 0x79, 0x7a, 0x7b,
      81  						   0x7c, 0x7d, 0x7e, 0x7f };
      82  VECT_VAR_DECL(expected_max_shift,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
      83  						   0xfff4, 0xfff5, 0xfff6, 0xfff7 };
      84  VECT_VAR_DECL(expected_max_shift,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
      85  						   0xfffffff2, 0xfffffff3 };
      86  VECT_VAR_DECL(expected_max_shift,uint,64,2) [] = { 0xfffffffffffffff0,
      87  						   0xfffffffffffffff1 };
      88  VECT_VAR_DECL(expected_max_shift,poly,8,16) [] = { 0x70, 0x71, 0x72, 0x73,
      89  						   0x74, 0x75, 0x76, 0x77,
      90  						   0x78, 0x79, 0x7a, 0x7b,
      91  						   0x7c, 0x7d, 0x7e, 0x7f };
      92  VECT_VAR_DECL(expected_max_shift,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
      93  						   0xfff4, 0xfff5, 0xfff6, 0xfff7 };
      94  
      95  #include "vsXi_n.inc"
      96  
      97  void vsli_extra(void)
      98  {
      99    /* Test cases with maximum shift amount (this amount is different
     100       from vsri).  */
     101  
     102    DECL_VARIABLE_ALL_VARIANTS(vector);
     103    DECL_VARIABLE_ALL_VARIANTS(vector2);
     104    DECL_VARIABLE_ALL_VARIANTS(vector_res);
     105  
     106    clean_results ();
     107  
     108    /* Initialize input "vector" from "buffer".  */
     109    TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
     110  
     111    /* Fill input vector2 with arbitrary values.  */
     112    VDUP(vector2, , int, s, 8, 8, 2);
     113    VDUP(vector2, , int, s, 16, 4, -4);
     114    VDUP(vector2, , int, s, 32, 2, 3);
     115    VDUP(vector2, , int, s, 64, 1, 100);
     116    VDUP(vector2, , uint, u, 8, 8, 20);
     117    VDUP(vector2, , uint, u, 16, 4, 30);
     118    VDUP(vector2, , uint, u, 32, 2, 40);
     119    VDUP(vector2, , uint, u, 64, 1, 2);
     120    VDUP(vector2, , poly, p, 8, 8, 20);
     121    VDUP(vector2, , poly, p, 16, 4, 30);
     122    VDUP(vector2, q, int, s, 8, 16, -10);
     123    VDUP(vector2, q, int, s, 16, 8, -20);
     124    VDUP(vector2, q, int, s, 32, 4, -30);
     125    VDUP(vector2, q, int, s, 64, 2, 24);
     126    VDUP(vector2, q, uint, u, 8, 16, 12);
     127    VDUP(vector2, q, uint, u, 16, 8, 3);
     128    VDUP(vector2, q, uint, u, 32, 4, 55);
     129    VDUP(vector2, q, uint, u, 64, 2, 3);
     130    VDUP(vector2, q, poly, p, 8, 16, 12);
     131    VDUP(vector2, q, poly, p, 16, 8, 3);
     132  
     133    /* Use maximum allowed shift amount.  */
     134    TEST_VSXI_N(INSN_NAME, , int, s, 8, 8, 7);
     135    TEST_VSXI_N(INSN_NAME, , int, s, 16, 4, 15);
     136    TEST_VSXI_N(INSN_NAME, , int, s, 32, 2, 31);
     137    TEST_VSXI_N(INSN_NAME, , int, s, 64, 1, 63);
     138    TEST_VSXI_N(INSN_NAME, , uint, u, 8, 8, 7);
     139    TEST_VSXI_N(INSN_NAME, , uint, u, 16, 4, 15);
     140    TEST_VSXI_N(INSN_NAME, , uint, u, 32, 2, 31);
     141    TEST_VSXI_N(INSN_NAME, , uint, u, 64, 1, 63);
     142    TEST_VSXI_N(INSN_NAME, , poly, p, 8, 8, 7);
     143    TEST_VSXI_N(INSN_NAME, , poly, p, 16, 4, 15);
     144    TEST_VSXI_N(INSN_NAME, q, int, s, 8, 16, 7);
     145    TEST_VSXI_N(INSN_NAME, q, int, s, 16, 8, 15);
     146    TEST_VSXI_N(INSN_NAME, q, int, s, 32, 4, 31);
     147    TEST_VSXI_N(INSN_NAME, q, int, s, 64, 2, 63);
     148    TEST_VSXI_N(INSN_NAME, q, uint, u, 8, 16, 7);
     149    TEST_VSXI_N(INSN_NAME, q, uint, u, 16, 8, 15);
     150    TEST_VSXI_N(INSN_NAME, q, uint, u, 32, 4, 31);
     151    TEST_VSXI_N(INSN_NAME, q, uint, u, 64, 2, 63);
     152    TEST_VSXI_N(INSN_NAME, q, poly, p, 8, 16, 7);
     153    TEST_VSXI_N(INSN_NAME, q, poly, p, 16, 8, 15);
     154  
     155  #define COMMENT "(max shift amount)"
     156    CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_shift, COMMENT);
     157    CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_shift, COMMENT);
     158    CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_shift, COMMENT);
     159    CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_shift, COMMENT);
     160    CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_shift, COMMENT);
     161    CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shift, COMMENT);
     162    CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shift, COMMENT);
     163    CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_shift, COMMENT);
     164    CHECK_POLY(TEST_MSG, poly, 8, 8, PRIx8, expected_max_shift, COMMENT);
     165    CHECK_POLY(TEST_MSG, poly, 16, 4, PRIx16, expected_max_shift, COMMENT);
     166    CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shift, COMMENT);
     167    CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shift, COMMENT);
     168    CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shift, COMMENT);
     169    CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_shift, COMMENT);
     170    CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shift, COMMENT);
     171    CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shift, COMMENT);
     172    CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shift, COMMENT);
     173    CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_shift, COMMENT);
     174    CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected_max_shift, COMMENT);
     175    CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected_max_shift, COMMENT);
     176  }