(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
advsimd-intrinsics/
vshl_n.c
       1  #include <arm_neon.h>
       2  #include "arm-neon-ref.h"
       3  #include "compute-ref-data.h"
       4  
       5  /* Expected results.  */
       6  VECT_VAR_DECL(expected,int,8,8) [] = { 0xe0, 0xe2, 0xe4, 0xe6,
       7  				       0xe8, 0xea, 0xec, 0xee };
       8  VECT_VAR_DECL(expected,int,16,4) [] = { 0xffe0, 0xffe2, 0xffe4, 0xffe6 };
       9  VECT_VAR_DECL(expected,int,32,2) [] = { 0xffffff80, 0xffffff88 };
      10  VECT_VAR_DECL(expected,int,64,1) [] = { 0xffffffffffffffc0 };
      11  VECT_VAR_DECL(expected,uint,8,8) [] = { 0xc0, 0xc4, 0xc8, 0xcc,
      12  					0xd0, 0xd4, 0xd8, 0xdc };
      13  VECT_VAR_DECL(expected,uint,16,4) [] = { 0xff00, 0xff10, 0xff20, 0xff30 };
      14  VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffff80, 0xffffff88 };
      15  VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffffe0 };
      16  VECT_VAR_DECL(expected,int,8,16) [] = { 0x0, 0x20, 0x40, 0x60,
      17  					0x80, 0xa0, 0xc0, 0xe0,
      18  					0x0, 0x20, 0x40, 0x60,
      19  					0x80, 0xa0, 0xc0, 0xe0 };
      20  VECT_VAR_DECL(expected,int,16,8) [] = { 0xffe0, 0xffe2, 0xffe4, 0xffe6,
      21  					0xffe8, 0xffea, 0xffec, 0xffee };
      22  VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffc0, 0xffffffc4,
      23  					0xffffffc8, 0xffffffcc };
      24  VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffffc0, 0xffffffffffffffc4 };
      25  VECT_VAR_DECL(expected,uint,8,16) [] = { 0xc0, 0xc4, 0xc8, 0xcc,
      26  					 0xd0, 0xd4, 0xd8, 0xdc,
      27  					 0xe0, 0xe4, 0xe8, 0xec,
      28  					 0xf0, 0xf4, 0xf8, 0xfc };
      29  VECT_VAR_DECL(expected,uint,16,8) [] = { 0xff80, 0xff88, 0xff90, 0xff98,
      30  					 0xffa0, 0xffa8, 0xffb0, 0xffb8 };
      31  VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffc0, 0xffffffc4,
      32  					 0xffffffc8, 0xffffffcc };
      33  VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffffe0,
      34  					 0xffffffffffffffe2 };
      35  
      36  #define TEST_MSG "VSHL_N"
      37  void exec_vshl_n (void)
      38  {
      39    /* Basic test: v2=vshl_n(v1,v), then store the result.  */
      40  #define TEST_VSHL_N(Q, T1, T2, W, N, V)					\
      41    VECT_VAR(vector_res, T1, W, N) =					\
      42      vshl##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
      43  			V);						\
      44    vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
      45  
      46    DECL_VARIABLE_ALL_VARIANTS(vector);
      47    DECL_VARIABLE_ALL_VARIANTS(vector_res);
      48  
      49    clean_results ();
      50  
      51    /* Initialize input "vector" from "buffer".  */
      52    TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
      53  
      54    /* Choose shift amount arbitrarily.  */
      55    TEST_VSHL_N(, int, s, 8, 8, 1);
      56    TEST_VSHL_N(, int, s, 16, 4, 1);
      57    TEST_VSHL_N(, int, s, 32, 2, 3);
      58    TEST_VSHL_N(, int, s, 64, 1, 2);
      59    TEST_VSHL_N(, uint, u, 8, 8, 2);
      60    TEST_VSHL_N(, uint, u, 16, 4, 4);
      61    TEST_VSHL_N(, uint, u, 32, 2, 3);
      62    TEST_VSHL_N(, uint, u, 64, 1, 1);
      63  
      64    TEST_VSHL_N(q, int, s, 8, 16, 5);
      65    TEST_VSHL_N(q, int, s, 16, 8, 1);
      66    TEST_VSHL_N(q, int, s, 32, 4, 2);
      67    TEST_VSHL_N(q, int, s, 64, 2, 2);
      68    TEST_VSHL_N(q, uint, u, 8, 16, 2);
      69    TEST_VSHL_N(q, uint, u, 16, 8, 3);
      70    TEST_VSHL_N(q, uint, u, 32, 4, 2);
      71    TEST_VSHL_N(q, uint, u, 64, 2, 1);
      72  
      73  #define CMT ""
      74    CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
      75    CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
      76    CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
      77    CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
      78    CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
      79    CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
      80    CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
      81    CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
      82    CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
      83    CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
      84    CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
      85    CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
      86    CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
      87    CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
      88    CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
      89    CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
      90  }
      91  
      92  int main (void)
      93  {
      94    exec_vshl_n ();
      95    return 0;
      96  }