1 /* { dg-do run } */
2 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
3 /* { dg-add-options arm_v8_2a_fp16_neon } */
4 /* { dg-skip-if "" { arm*-*-* } } */
5
6 #include <arm_neon.h>
7 #include "arm-neon-ref.h"
8 #include "compute-ref-data.h"
9
10 #define FP16_C(a) ((__fp16) a)
11 #define A FP16_C (13.4)
12 #define B FP16_C (__builtin_inff ())
13 #define C FP16_C (-34.8)
14 #define D FP16_C (-__builtin_inff ())
15 #define E FP16_C (-0.0)
16 #define F FP16_C (19.1)
17 #define G FP16_C (-4.8)
18 #define H FP16_C (0.0)
19
20 #define I FP16_C (0.7)
21 #define J FP16_C (-78)
22 #define K FP16_C (-__builtin_inff ())
23 #define L FP16_C (98)
24 #define M FP16_C (87.1)
25 #define N FP16_C (-8)
26 #define O FP16_C (-1.1)
27 #define P FP16_C (-0.0)
28
29 /* Expected results for vmulx_lane. */
30 VECT_VAR_DECL (expected0_static, hfloat, 16, 4) []
31 = { 0x8000 /* A * E. */,
32 0xC000 /* FP16_C (-2.0f). */,
33 0x0000 /* C * E. */,
34 0x4000 /* FP16_C (2.0f). */ };
35
36 VECT_VAR_DECL (expected1_static, hfloat, 16, 4) []
37 = { 0x5BFF /* A * F. */,
38 0x7C00 /* B * F. */,
39 0xE131 /* C * F. */,
40 0xFC00 /* D * F. */ };
41
42 VECT_VAR_DECL (expected2_static, hfloat, 16, 4) []
43 = { 0xD405 /* A * G. */,
44 0xFC00 /* B * G. */,
45 0x5939 /* C * G. */,
46 0x7C00 /* D * G. */ };
47
48 VECT_VAR_DECL (expected3_static, hfloat, 16, 4) []
49 = { 0x0000 /* A * H. */,
50 0x4000 /* FP16_C (2.0f). */,
51 0x8000 /* C * H. */,
52 0xC000 /* FP16_C (-2.0f). */ };
53
54 /* Expected results for vmulxq_lane. */
55 VECT_VAR_DECL (expected0_static, hfloat, 16, 8) []
56 = { 0x8000 /* A * E. */,
57 0xC000 /* FP16_C (-2.0f). */,
58 0x0000 /* C * E. */,
59 0x4000 /* FP16_C (2.0f). */,
60 0x8000 /* I * E. */,
61 0x0000 /* J * E. */,
62 0x4000 /* FP16_C (2.0f). */,
63 0x8000 /* L * E. */ };
64
65 VECT_VAR_DECL (expected1_static, hfloat, 16, 8) []
66 = { 0x5BFF /* A * F. */,
67 0x7C00 /* B * F. */,
68 0xE131 /* C * F. */,
69 0xFC00 /* D * F. */,
70 0x4AAF /* I * F. */,
71 0xE5D1 /* J * F. */,
72 0xFC00 /* K * F. */,
73 0x674F /* L * F. */ };
74
75 VECT_VAR_DECL (expected2_static, hfloat, 16, 8) []
76 = { 0xD405 /* A * G. */,
77 0xFC00 /* B * G. */,
78 0x5939 /* C * G. */,
79 0x7C00 /* D * G. */,
80 0xC2B9 /* I * G. */,
81 0x5DDA /* J * G. */,
82 0x7C00 /* K * G. */,
83 0xDF5A /* L * G. */ };
84
85 VECT_VAR_DECL (expected3_static, hfloat, 16, 8) []
86 = { 0x0000 /* A * H. */,
87 0x4000 /* FP16_C (2.0f). */,
88 0x8000 /* C * H. */,
89 0xC000 /* FP16_C (-2.0f). */,
90 0x0000 /* I * H. */,
91 0x8000 /* J * H. */,
92 0xC000 /* FP16_C (-2.0f). */,
93 0x0000 /* L * H. */};
94
95 /* Expected results for vmulx_laneq. */
96 VECT_VAR_DECL (expected_laneq0_static, hfloat, 16, 4) []
97 = { 0x8000 /* A * E. */,
98 0xC000 /* FP16_C (-2.0f). */,
99 0x0000 /* C * E. */,
100 0x4000 /* FP16_C (2.0f). */ };
101
102 VECT_VAR_DECL (expected_laneq1_static, hfloat, 16, 4) []
103 = { 0x5BFF /* A * F. */,
104 0x7C00 /* B * F. */,
105 0xE131 /* C * F. */,
106 0xFC00 /* D * F. */ };
107
108 VECT_VAR_DECL (expected_laneq2_static, hfloat, 16, 4) []
109 = { 0xD405 /* A * G. */,
110 0xFC00 /* B * G. */,
111 0x5939 /* C * G. */,
112 0x7C00 /* D * G. */ };
113
114 VECT_VAR_DECL (expected_laneq3_static, hfloat, 16, 4) []
115 = { 0x0000 /* A * H. */,
116 0x4000 /* FP16_C (2.0f). */,
117 0x8000 /* C * H. */,
118 0xC000 /* FP16_C (-2.0f). */ };
119
120 VECT_VAR_DECL (expected_laneq4_static, hfloat, 16, 4) []
121 = { 0x648F /* A * M. */,
122 0x7C00 /* B * M. */,
123 0xE9ED /* C * M. */,
124 0xFC00 /* D * M. */ };
125
126 VECT_VAR_DECL (expected_laneq5_static, hfloat, 16, 4) []
127 = { 0xD6B3 /* A * N. */,
128 0xFC00 /* B * N. */,
129 0x5C5A /* C * N. */,
130 0x7C00 /* D * N. */ };
131
132 VECT_VAR_DECL (expected_laneq6_static, hfloat, 16, 4) []
133 = { 0xCB5E /* A * O. */,
134 0xFC00 /* B * O. */,
135 0x50C9 /* C * O. */,
136 0x7C00 /* D * O. */ };
137
138 VECT_VAR_DECL (expected_laneq7_static, hfloat, 16, 4) []
139 = { 0x8000 /* A * P. */,
140 0xC000 /* FP16_C (-2.0f). */,
141 0x0000 /* C * P. */,
142 0x4000 /* FP16_C (2.0f). */ };
143
144 VECT_VAR_DECL (expected_laneq0_static, hfloat, 16, 8) []
145 = { 0x8000 /* A * E. */,
146 0xC000 /* FP16_C (-2.0f). */,
147 0x0000 /* C * E. */,
148 0x4000 /* FP16_C (2.0f). */,
149 0x8000 /* I * E. */,
150 0x0000 /* J * E. */,
151 0x4000 /* FP16_C (2.0f). */,
152 0x8000 /* L * E. */ };
153
154 VECT_VAR_DECL (expected_laneq1_static, hfloat, 16, 8) []
155 = { 0x5BFF /* A * F. */,
156 0x7C00 /* B * F. */,
157 0xE131 /* C * F. */,
158 0xFC00 /* D * F. */,
159 0x4AAF /* I * F. */,
160 0xE5D1 /* J * F. */,
161 0xFC00 /* K * F. */,
162 0x674F /* L * F. */ };
163
164 VECT_VAR_DECL (expected_laneq2_static, hfloat, 16, 8) []
165 = { 0xD405 /* A * G. */,
166 0xFC00 /* B * G. */,
167 0x5939 /* C * G. */,
168 0x7C00 /* D * G. */,
169 0xC2B9 /* I * G. */,
170 0x5DDA /* J * G. */,
171 0x7C00 /* K * G. */,
172 0xDF5A /* L * G. */ };
173
174 VECT_VAR_DECL (expected_laneq3_static, hfloat, 16, 8) []
175 = { 0x0000 /* A * H. */,
176 0x4000 /* FP16_C (2.0f). */,
177 0x8000 /* C * H. */,
178 0xC000 /* FP16_C (-2.0f). */,
179 0x0000 /* I * H. */,
180 0x8000 /* J * H. */,
181 0xC000 /* FP16_C (-2.0f). */,
182 0x0000 /* L * H. */ };
183
184 VECT_VAR_DECL (expected_laneq4_static, hfloat, 16, 8) []
185 = { 0x648F /* A * M. */,
186 0x7C00 /* B * M. */,
187 0xE9ED /* C * M. */,
188 0xFC00 /* D * M. */,
189 0x53A0 /* I * M. */,
190 0xEEA3 /* J * M. */,
191 0xFC00 /* K * M. */,
192 0x702B /* L * M. */ };
193
194 VECT_VAR_DECL (expected_laneq5_static, hfloat, 16, 8) []
195 = { 0xD6B3 /* A * N. */,
196 0xFC00 /* B * N. */,
197 0x5C5A /* C * N. */,
198 0x7C00 /* D * N. */,
199 0xC59A /* I * N. */,
200 0x60E0 /* J * N. */,
201 0x7C00 /* K * N. */,
202 0xE220 /* L * N. */ };
203
204 VECT_VAR_DECL (expected_laneq6_static, hfloat, 16, 8) []
205 = { 0xCB5E /* A * O. */,
206 0xFC00 /* B * O. */,
207 0x50C9 /* C * O. */,
208 0x7C00 /* D * O. */,
209 0xBA29 /* I * O. */,
210 0x555C /* J * O. */,
211 0x7C00 /* K * O. */,
212 0xD6BC /* L * O. */ };
213
214 VECT_VAR_DECL (expected_laneq7_static, hfloat, 16, 8) []
215 = { 0x8000 /* A * P. */,
216 0xC000 /* FP16_C (-2.0f). */,
217 0x0000 /* C * P. */,
218 0x4000 /* FP16_C (2.0f). */,
219 0x8000 /* I * P. */,
220 0x0000 /* J * P. */,
221 0x4000 /* FP16_C (2.0f). */,
222 0x8000 /* L * P. */ };
223
224 void exec_vmulx_lane_f16 (void)
225 {
226 #undef TEST_MSG
227 #define TEST_MSG "VMULX_LANE (FP16)"
228 clean_results ();
229
230 DECL_VARIABLE(vsrc_1, float, 16, 4);
231 DECL_VARIABLE(vsrc_2, float, 16, 4);
232 VECT_VAR_DECL (buf_src_1, float, 16, 4) [] = {A, B, C, D};
233 VECT_VAR_DECL (buf_src_2, float, 16, 4) [] = {E, F, G, H};
234 VLOAD (vsrc_1, buf_src_1, , float, f, 16, 4);
235 VLOAD (vsrc_2, buf_src_2, , float, f, 16, 4);
236 DECL_VARIABLE (vector_res, float, 16, 4)
237 = vmulx_lane_f16 (VECT_VAR (vsrc_1, float, 16, 4),
238 VECT_VAR (vsrc_2, float, 16, 4), 0);
239 vst1_f16 (VECT_VAR (result, float, 16, 4),
240 VECT_VAR (vector_res, float, 16, 4));
241
242 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected0_static, "");
243
244 VECT_VAR (vector_res, float, 16, 4)
245 = vmulx_lane_f16 (VECT_VAR (vsrc_1, float, 16, 4),
246 VECT_VAR (vsrc_2, float, 16, 4), 1);
247 vst1_f16 (VECT_VAR (result, float, 16, 4),
248 VECT_VAR (vector_res, float, 16, 4));
249
250 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected1_static, "");
251
252 VECT_VAR (vector_res, float, 16, 4)
253 = vmulx_lane_f16 (VECT_VAR (vsrc_1, float, 16, 4),
254 VECT_VAR (vsrc_2, float, 16, 4), 2);
255 vst1_f16 (VECT_VAR (result, float, 16, 4),
256 VECT_VAR (vector_res, float, 16, 4));
257
258 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected2_static, "");
259
260 VECT_VAR (vector_res, float, 16, 4)
261 = vmulx_lane_f16 (VECT_VAR (vsrc_1, float, 16, 4),
262 VECT_VAR (vsrc_2, float, 16, 4), 3);
263 vst1_f16 (VECT_VAR (result, float, 16, 4),
264 VECT_VAR (vector_res, float, 16, 4));
265
266 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected3_static, "");
267
268 #undef TEST_MSG
269 #define TEST_MSG "VMULXQ_LANE (FP16)"
270 clean_results ();
271
272 DECL_VARIABLE(vsrc_1, float, 16, 8);
273 VECT_VAR_DECL (buf_src_1, float, 16, 8) [] = {A, B, C, D, I, J, K, L};
274 VLOAD (vsrc_1, buf_src_1, q, float, f, 16, 8);
275 DECL_VARIABLE (vector_res, float, 16, 8)
276 = vmulxq_lane_f16 (VECT_VAR (vsrc_1, float, 16, 8),
277 VECT_VAR (vsrc_2, float, 16, 4), 0);
278 vst1q_f16 (VECT_VAR (result, float, 16, 8),
279 VECT_VAR (vector_res, float, 16, 8));
280
281 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected0_static, "");
282
283 VECT_VAR (vector_res, float, 16, 8)
284 = vmulxq_lane_f16 (VECT_VAR (vsrc_1, float, 16, 8),
285 VECT_VAR (vsrc_2, float, 16, 4), 1);
286 vst1q_f16 (VECT_VAR (result, float, 16, 8),
287 VECT_VAR (vector_res, float, 16, 8));
288
289 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected1_static, "");
290
291 VECT_VAR (vector_res, float, 16, 8)
292 = vmulxq_lane_f16 (VECT_VAR (vsrc_1, float, 16, 8),
293 VECT_VAR (vsrc_2, float, 16, 4), 2);
294 vst1q_f16 (VECT_VAR (result, float, 16, 8),
295 VECT_VAR (vector_res, float, 16, 8));
296
297 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected2_static, "");
298
299 VECT_VAR (vector_res, float, 16, 8)
300 = vmulxq_lane_f16 (VECT_VAR (vsrc_1, float, 16, 8),
301 VECT_VAR (vsrc_2, float, 16, 4), 3);
302 vst1q_f16 (VECT_VAR (result, float, 16, 8),
303 VECT_VAR (vector_res, float, 16, 8));
304
305 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected3_static, "");
306
307 #undef TEST_MSG
308 #define TEST_MSG "VMULX_LANEQ (FP16)"
309 clean_results ();
310
311 DECL_VARIABLE(vsrc_2, float, 16, 8);
312 VECT_VAR_DECL (buf_src_2, float, 16, 8) [] = {E, F, G, H, M, N, O, P};
313 VLOAD (vsrc_2, buf_src_2, q, float, f, 16, 8);
314 VECT_VAR (vector_res, float, 16, 4)
315 = vmulx_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 4),
316 VECT_VAR (vsrc_2, float, 16, 8), 0);
317 vst1_f16 (VECT_VAR (result, float, 16, 4),
318 VECT_VAR (vector_res, float, 16, 4));
319
320 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected_laneq0_static, "");
321
322 VECT_VAR (vector_res, float, 16, 4)
323 = vmulx_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 4),
324 VECT_VAR (vsrc_2, float, 16, 8), 1);
325 vst1_f16 (VECT_VAR (result, float, 16, 4),
326 VECT_VAR (vector_res, float, 16, 4));
327
328 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected_laneq1_static, "");
329
330 VECT_VAR (vector_res, float, 16, 4)
331 = vmulx_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 4),
332 VECT_VAR (vsrc_2, float, 16, 8), 2);
333 vst1_f16 (VECT_VAR (result, float, 16, 4),
334 VECT_VAR (vector_res, float, 16, 4));
335
336 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected_laneq2_static, "");
337
338 VECT_VAR (vector_res, float, 16, 4)
339 = vmulx_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 4),
340 VECT_VAR (vsrc_2, float, 16, 8), 3);
341 vst1_f16 (VECT_VAR (result, float, 16, 4),
342 VECT_VAR (vector_res, float, 16, 4));
343
344 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected_laneq3_static, "");
345
346 VECT_VAR (vector_res, float, 16, 4)
347 = vmulx_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 4),
348 VECT_VAR (vsrc_2, float, 16, 8), 4);
349 vst1_f16 (VECT_VAR (result, float, 16, 4),
350 VECT_VAR (vector_res, float, 16, 4));
351
352 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected_laneq4_static, "");
353
354 VECT_VAR (vector_res, float, 16, 4)
355 = vmulx_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 4),
356 VECT_VAR (vsrc_2, float, 16, 8), 5);
357 vst1_f16 (VECT_VAR (result, float, 16, 4),
358 VECT_VAR (vector_res, float, 16, 4));
359
360 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected_laneq5_static, "");
361
362 VECT_VAR (vector_res, float, 16, 4)
363 = vmulx_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 4),
364 VECT_VAR (vsrc_2, float, 16, 8), 6);
365 vst1_f16 (VECT_VAR (result, float, 16, 4),
366 VECT_VAR (vector_res, float, 16, 4));
367
368 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected_laneq6_static, "");
369
370 VECT_VAR (vector_res, float, 16, 4)
371 = vmulx_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 4),
372 VECT_VAR (vsrc_2, float, 16, 8), 7);
373 vst1_f16 (VECT_VAR (result, float, 16, 4),
374 VECT_VAR (vector_res, float, 16, 4));
375
376 CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected_laneq7_static, "");
377
378 #undef TEST_MSG
379 #define TEST_MSG "VMULXQ_LANEQ (FP16)"
380 clean_results ();
381
382 VECT_VAR (vector_res, float, 16, 8)
383 = vmulxq_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 8),
384 VECT_VAR (vsrc_2, float, 16, 8), 0);
385 vst1q_f16 (VECT_VAR (result, float, 16, 8),
386 VECT_VAR (vector_res, float, 16, 8));
387
388 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_laneq0_static, "");
389
390 VECT_VAR (vector_res, float, 16, 8)
391 = vmulxq_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 8),
392 VECT_VAR (vsrc_2, float, 16, 8), 1);
393 vst1q_f16 (VECT_VAR (result, float, 16, 8),
394 VECT_VAR (vector_res, float, 16, 8));
395
396 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_laneq1_static, "");
397
398 VECT_VAR (vector_res, float, 16, 8)
399 = vmulxq_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 8),
400 VECT_VAR (vsrc_2, float, 16, 8), 2);
401 vst1q_f16 (VECT_VAR (result, float, 16, 8),
402 VECT_VAR (vector_res, float, 16, 8));
403
404 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_laneq2_static, "");
405
406 VECT_VAR (vector_res, float, 16, 8)
407 = vmulxq_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 8),
408 VECT_VAR (vsrc_2, float, 16, 8), 3);
409 vst1q_f16 (VECT_VAR (result, float, 16, 8),
410 VECT_VAR (vector_res, float, 16, 8));
411
412 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_laneq3_static, "");
413
414 VECT_VAR (vector_res, float, 16, 8)
415 = vmulxq_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 8),
416 VECT_VAR (vsrc_2, float, 16, 8), 4);
417 vst1q_f16 (VECT_VAR (result, float, 16, 8),
418 VECT_VAR (vector_res, float, 16, 8));
419
420 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_laneq4_static, "");
421
422 VECT_VAR (vector_res, float, 16, 8)
423 = vmulxq_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 8),
424 VECT_VAR (vsrc_2, float, 16, 8), 5);
425 vst1q_f16 (VECT_VAR (result, float, 16, 8),
426 VECT_VAR (vector_res, float, 16, 8));
427
428 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_laneq5_static, "");
429
430 VECT_VAR (vector_res, float, 16, 8)
431 = vmulxq_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 8),
432 VECT_VAR (vsrc_2, float, 16, 8), 6);
433 vst1q_f16 (VECT_VAR (result, float, 16, 8),
434 VECT_VAR (vector_res, float, 16, 8));
435
436 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_laneq6_static, "");
437
438 VECT_VAR (vector_res, float, 16, 8)
439 = vmulxq_laneq_f16 (VECT_VAR (vsrc_1, float, 16, 8),
440 VECT_VAR (vsrc_2, float, 16, 8), 7);
441 vst1q_f16 (VECT_VAR (result, float, 16, 8),
442 VECT_VAR (vector_res, float, 16, 8));
443
444 CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_laneq7_static, "");
445 }
446
447 int
448 main (void)
449 {
450 exec_vmulx_lane_f16 ();
451 return 0;
452 }