(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
advsimd-intrinsics/
vmovn_high.c
       1  /* { dg-skip-if "" { arm*-*-* } } */
       2  
       3  #include <arm_neon.h>
       4  #include "arm-neon-ref.h"
       5  #include "compute-ref-data.h"
       6  
       7  /* Expected results.  */
       8  VECT_VAR_DECL(expected, int, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
       9  					   0x5, 0x5, 0x5, 0x5,
      10  					   0xf0, 0xf1, 0xf2, 0xf3,
      11  				           0xf4, 0xf5, 0xf6, 0xf7 };
      12  VECT_VAR_DECL(expected, int, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5, 
      13  					   0xfff0, 0xfff1, 0xfff2, 0xfff3 };
      14  VECT_VAR_DECL(expected, int, 32, 4) [] = { 0x5, 0x5, 0xfffffff0, 0xfffffff1 };
      15  VECT_VAR_DECL(expected, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
      16  					    0x5, 0x5, 0x5, 0x5,
      17  					    0xf0, 0xf1, 0xf2, 0xf3,
      18  					    0xf4, 0xf5, 0xf6, 0xf7 };
      19  VECT_VAR_DECL(expected, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
      20  					    0xfff0, 0xfff1, 0xfff2, 0xfff3 };
      21  VECT_VAR_DECL(expected, uint, 32, 4) [] = { 0x5, 0x5, 0xfffffff0, 0xfffffff1 };
      22  
      23  #define TEST_MSG "VMOVN_HIGH"
      24  void exec_vmovn_high (void)
      25  {
      26    /* Basic test: vec128_r=vmovn_high(vec64_r, vec128_x), store the result.  */
      27  #define TEST_VMOVN_HIGH(T1, T2, W1, W2, N1, N2)					\
      28    VECT_VAR(vec128_r, T1, W2, N2) =						\
      29      vmovn_high_##T2##W1(VECT_VAR(vec64_r, T1, W2, N1),				\
      30  			VECT_VAR(vec128_x, T1, W1, N1));			\
      31    vst1q_##T2##W2(VECT_VAR(result, T1, W2, N2), VECT_VAR(vec128_r, T1, W2, N2))
      32  
      33    DECL_VARIABLE_128BITS_VARIANTS(vec128_r);
      34    DECL_VARIABLE_64BITS_VARIANTS(vec64_r);
      35    DECL_VARIABLE_128BITS_VARIANTS(vec128_x);
      36  
      37    clean_results ();
      38  
      39    /* Fill vec64_r with a value easy to recognise in the result vector. */
      40    VDUP(vec64_r, , int, s, 8, 8, 0x5);
      41    VDUP(vec64_r, , int, s, 16, 4, 0x5);
      42    VDUP(vec64_r, , int, s, 32, 2, 0x5);
      43    VDUP(vec64_r, , uint, u, 8, 8, 0x5);
      44    VDUP(vec64_r, , uint, u, 16, 4, 0x5);
      45    VDUP(vec64_r, , uint, u, 32, 2, 0x5);
      46  
      47    VLOAD(vec128_x, buffer, q, int, s, 16, 8);
      48    VLOAD(vec128_x, buffer, q, int, s, 32, 4);
      49    VLOAD(vec128_x, buffer, q, int, s, 64, 2);
      50    VLOAD(vec128_x, buffer, q, uint, u, 16, 8);
      51    VLOAD(vec128_x, buffer, q, uint, u, 32, 4);
      52    VLOAD(vec128_x, buffer, q, uint, u, 64, 2);
      53  
      54    TEST_VMOVN_HIGH(int, s, 16, 8, 8, 16);
      55    TEST_VMOVN_HIGH(int, s, 32, 16, 4, 8);
      56    TEST_VMOVN_HIGH(int, s, 64, 32, 2, 4);
      57    TEST_VMOVN_HIGH(uint, u, 16, 8, 8, 16);
      58    TEST_VMOVN_HIGH(uint, u, 32, 16, 4, 8);
      59    TEST_VMOVN_HIGH(uint, u, 64, 32, 2, 4);
      60  
      61    CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
      62    CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
      63    CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
      64    CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
      65    CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
      66    CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
      67  }
      68  
      69  int main (void)
      70  {
      71    exec_vmovn_high ();
      72    return 0;
      73  }