(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
advsimd-intrinsics/
vdiv_f16_1.c
       1  /* { dg-do run } */
       2  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
       3  /* { dg-add-options arm_v8_2a_fp16_neon } */
       4  /* { dg-skip-if "" { arm*-*-* } } */
       5  
       6  #include <arm_neon.h>
       7  #include "arm-neon-ref.h"
       8  #include "compute-ref-data.h"
       9  
      10  #define FP16_C(a) ((__fp16) a)
      11  #define A FP16_C (13.4)
      12  #define B FP16_C (-56.8)
      13  #define C FP16_C (-34.8)
      14  #define D FP16_C (12)
      15  #define E FP16_C (63.1)
      16  #define F FP16_C (19.1)
      17  #define G FP16_C (-4.8)
      18  #define H FP16_C (77)
      19  
      20  #define I FP16_C (0.7)
      21  #define J FP16_C (-78)
      22  #define K FP16_C (11.23)
      23  #define L FP16_C (98)
      24  #define M FP16_C (87.1)
      25  #define N FP16_C (-8)
      26  #define O FP16_C (-1.1)
      27  #define P FP16_C (-9.7)
      28  
      29  /* Expected results for vdiv.  */
      30  VECT_VAR_DECL (expected_div_static, hfloat, 16, 4) []
      31    = { 0x32CC /* A / E.  */, 0xC1F3 /* B / F.  */,
      32        0x4740 /* C / G.  */, 0x30FD /* D / H.  */ };
      33  
      34  VECT_VAR_DECL (expected_div_static, hfloat, 16, 8) []
      35    = { 0x32CC /* A / E.  */, 0xC1F3 /* B / F.  */,
      36        0x4740 /* C / G.  */, 0x30FD /* D / H.  */,
      37        0x201D /* I / M.  */, 0x48E0 /* J / N.  */,
      38        0xC91B /* K / O.  */, 0xC90D /* L / P.  */ };
      39  
      40  void exec_vdiv_f16 (void)
      41  {
      42  #undef TEST_MSG
      43  #define TEST_MSG "VDIV (FP16)"
      44    clean_results ();
      45  
      46    DECL_VARIABLE(vsrc_1, float, 16, 4);
      47    DECL_VARIABLE(vsrc_2, float, 16, 4);
      48    VECT_VAR_DECL (buf_src_1, float, 16, 4) [] = {A, B, C, D};
      49    VECT_VAR_DECL (buf_src_2, float, 16, 4) [] = {E, F, G, H};
      50    VLOAD (vsrc_1, buf_src_1, , float, f, 16, 4);
      51    VLOAD (vsrc_2, buf_src_2, , float, f, 16, 4);
      52  
      53    DECL_VARIABLE (vector_res, float, 16, 4)
      54      = vdiv_f16 (VECT_VAR (vsrc_1, float, 16, 4),
      55  		VECT_VAR (vsrc_2, float, 16, 4));
      56    vst1_f16 (VECT_VAR (result, float, 16, 4),
      57  	    VECT_VAR (vector_res, float, 16, 4));
      58  
      59    CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected_div_static, "");
      60  
      61  #undef TEST_MSG
      62  #define TEST_MSG "VDIVQ (FP16)"
      63    clean_results ();
      64  
      65    DECL_VARIABLE(vsrc_1, float, 16, 8);
      66    DECL_VARIABLE(vsrc_2, float, 16, 8);
      67    VECT_VAR_DECL (buf_src_1, float, 16, 8) [] = {A, B, C, D, I, J, K, L};
      68    VECT_VAR_DECL (buf_src_2, float, 16, 8) [] = {E, F, G, H, M, N, O, P};
      69    VLOAD (vsrc_1, buf_src_1, q, float, f, 16, 8);
      70    VLOAD (vsrc_2, buf_src_2, q, float, f, 16, 8);
      71  
      72    DECL_VARIABLE (vector_res, float, 16, 8)
      73      = vdivq_f16 (VECT_VAR (vsrc_1, float, 16, 8),
      74  		 VECT_VAR (vsrc_2, float, 16, 8));
      75    vst1q_f16 (VECT_VAR (result, float, 16, 8),
      76  	     VECT_VAR (vector_res, float, 16, 8));
      77  
      78    CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_div_static, "");
      79  }
      80  
      81  int
      82  main (void)
      83  {
      84    exec_vdiv_f16 ();
      85    return 0;
      86  }