1  /* { dg-require-effective-target arm_neon_fp16_hw { target { arm*-*-* } } } */
       2  #include <arm_neon.h>
       3  #include "arm-neon-ref.h"
       4  #include "compute-ref-data.h"
       5  #include <math.h>
       6  
       7  /* Expected results for vcvt.  */
       8  VECT_VAR_DECL (expected,hfloat,32,4) [] = { 0x41800000, 0x41700000,
       9  					    0x41600000, 0x41500000 };
      10  VECT_VAR_DECL (expected,hfloat,16,4) [] = { 0x3e00, 0x4100, 0x4300, 0x4480 };
      11  
      12  /* Expected results for vcvt_high_f32_f16.  */
      13  VECT_VAR_DECL (expected_high,hfloat,32,4) [] = { 0xc1400000, 0xc1300000,
      14  						 0xc1200000, 0xc1100000 };
      15  /* Expected results for vcvt_high_f16_f32.  */
      16  VECT_VAR_DECL (expected_high,hfloat,16,8) [] = { 0x4000, 0x4000, 0x4000, 0x4000,
      17  						 0xcc00, 0xcb80, 0xcb00, 0xca80 };
      18  
      19  void
      20  exec_vcvt (void)
      21  {
      22    clean_results ();
      23  
      24  #define TEST_MSG "vcvt_f32_f16"
      25    {
      26      VECT_VAR_DECL (buffer_src, float, 16, 4) [] = { 16.0, 15.0, 14.0, 13.0 };
      27  
      28      DECL_VARIABLE (vector_src, float, 16, 4);
      29  
      30      VLOAD (vector_src, buffer_src, , float, f, 16, 4);
      31      DECL_VARIABLE (vector_res, float, 32, 4) =
      32  	vcvt_f32_f16 (VECT_VAR (vector_src, float, 16, 4));
      33      vst1q_f32 (VECT_VAR (result, float, 32, 4),
      34  	       VECT_VAR (vector_res, float, 32, 4));
      35  
      36      CHECK_FP (TEST_MSG, float, 32, 4, PRIx32, expected, "");
      37    }
      38  #undef TEST_MSG
      39  
      40    clean_results ();
      41  
      42  #define TEST_MSG "vcvt_f16_f32"
      43    {
      44      VECT_VAR_DECL (buffer_src, float, 32, 4) [] = { 1.5, 2.5, 3.5, 4.5 };
      45      DECL_VARIABLE (vector_src, float, 32, 4);
      46  
      47      VLOAD (vector_src, buffer_src, q, float, f, 32, 4);
      48      DECL_VARIABLE (vector_res, float, 16, 4) =
      49        vcvt_f16_f32 (VECT_VAR (vector_src, float, 32, 4));
      50      vst1_f16 (VECT_VAR (result, float, 16, 4),
      51  	      VECT_VAR (vector_res, float, 16 ,4));
      52  
      53      CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected, "");
      54    }
      55  #undef TEST_MSG
      56  
      57    /* We run more tests for AArch64 as the relevant intrinsics
      58       do not exist on AArch32.  */
      59  #if defined (__aarch64__)
      60    clean_results ();
      61  
      62  #define TEST_MSG "vcvt_high_f32_f16"
      63    {
      64      DECL_VARIABLE (vector_src, float, 16, 8);
      65      VLOAD (vector_src, buffer, q, float, f, 16, 8);
      66      DECL_VARIABLE (vector_res, float, 32, 4);
      67      VECT_VAR (vector_res, float, 32, 4) =
      68        vcvt_high_f32_f16 (VECT_VAR (vector_src, float, 16, 8));
      69      vst1q_f32 (VECT_VAR (result, float, 32, 4),
      70  	       VECT_VAR (vector_res, float, 32, 4));
      71      CHECK_FP (TEST_MSG, float, 32, 4, PRIx32, expected_high, "");
      72    }
      73  #undef TEST_MSG
      74    clean_results ();
      75  
      76  #define TEST_MSG "vcvt_high_f16_f32"
      77    {
      78      DECL_VARIABLE (vector_low, float, 16, 4);
      79      VDUP (vector_low, , float, f, 16, 4, 2.0);
      80  
      81      DECL_VARIABLE (vector_src, float, 32, 4);
      82      VLOAD (vector_src, buffer, q, float, f, 32, 4);
      83  
      84      DECL_VARIABLE (vector_res, float, 16, 8) =
      85        vcvt_high_f16_f32 (VECT_VAR (vector_low, float, 16, 4),
      86  			 VECT_VAR (vector_src, float, 32, 4));
      87      vst1q_f16 (VECT_VAR (result, float, 16, 8),
      88  	       VECT_VAR (vector_res, float, 16, 8));
      89  
      90      CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_high, "");
      91    }
      92  #endif
      93  }
      94  
      95  int
      96  main (void)
      97  {
      98    exec_vcvt ();
      99    return 0;
     100  }