(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
advsimd-intrinsics/
vcombine.c
       1  #include <arm_neon.h>
       2  #include "arm-neon-ref.h"
       3  #include "compute-ref-data.h"
       4  
       5  /* Expected results.  */
       6  VECT_VAR_DECL(expected,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
       7  					0xf4, 0xf5, 0xf6, 0xf7,
       8  					0x11, 0x11, 0x11, 0x11,
       9  					0x11, 0x11, 0x11, 0x11 };
      10  VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
      11  					0x22, 0x22, 0x22, 0x22 };
      12  VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff0, 0xfffffff1, 0x33, 0x33 };
      13  VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff0, 0x44 };
      14  VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
      15  					 0xf4, 0xf5, 0xf6, 0xf7,
      16  					 0x55, 0x55, 0x55, 0x55,
      17  					 0x55, 0x55, 0x55, 0x55 };
      18  VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
      19  					 0x66, 0x66, 0x66, 0x66 };
      20  VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff0, 0xfffffff1, 0x77, 0x77 };
      21  VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0, 0x88 };
      22  VECT_VAR_DECL(expected,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
      23  					 0xf4, 0xf5, 0xf6, 0xf7,
      24  					 0x55, 0x55, 0x55, 0x55,
      25  					 0x55, 0x55, 0x55, 0x55 };
      26  VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
      27  					 0x66, 0x66, 0x66, 0x66 };
      28  VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
      29  					   0x40533333, 0x40533333 };
      30  VECT_VAR_DECL(expected,hfloat,16,8) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80,
      31  					   0x4080, 0x4080, 0x4080, 0x4080 };
      32  
      33  #define TEST_MSG "VCOMBINE"
      34  void exec_vcombine (void)
      35  {
      36    /* Basic test: vec128=vcombine(vec64_a, vec64_b), then store the result.  */
      37  #define TEST_VCOMBINE(T1, T2, W, N, N2)					\
      38    VECT_VAR(vector128, T1, W, N2) =					\
      39      vcombine_##T2##W(VECT_VAR(vector64_a, T1, W, N),			\
      40  		     VECT_VAR(vector64_b, T1, W, N));			\
      41    vst1q_##T2##W(VECT_VAR(result, T1, W, N2), VECT_VAR(vector128, T1, W, N2))
      42  
      43    DECL_VARIABLE_64BITS_VARIANTS(vector64_a);
      44    DECL_VARIABLE_64BITS_VARIANTS(vector64_b);
      45    DECL_VARIABLE_128BITS_VARIANTS(vector128);
      46  
      47    /* Initialize input "vector64_a" from "buffer".  */
      48    TEST_MACRO_64BITS_VARIANTS_2_5(VLOAD, vector64_a, buffer);
      49  #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
      50    VLOAD(vector64_a, buffer, , float, f, 16, 4);
      51  #endif
      52    VLOAD(vector64_a, buffer, , float, f, 32, 2);
      53  
      54    /* Choose init value arbitrarily.  */
      55    VDUP(vector64_b, , int, s, 8, 8, 0x11);
      56    VDUP(vector64_b, , int, s, 16, 4, 0x22);
      57    VDUP(vector64_b, , int, s, 32, 2, 0x33);
      58    VDUP(vector64_b, , int, s, 64, 1, 0x44);
      59    VDUP(vector64_b, , uint, u, 8, 8, 0x55);
      60    VDUP(vector64_b, , uint, u, 16, 4, 0x66);
      61    VDUP(vector64_b, , uint, u, 32, 2, 0x77);
      62    VDUP(vector64_b, , uint, u, 64, 1, 0x88);
      63    VDUP(vector64_b, , poly, p, 8, 8, 0x55);
      64    VDUP(vector64_b, , poly, p, 16, 4, 0x66);
      65  #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
      66    VDUP(vector64_b, , float, f, 16, 4, 2.25);
      67  #endif
      68    VDUP(vector64_b, , float, f, 32, 2, 3.3f);
      69  
      70    clean_results ();
      71  
      72    /* Execute the tests.  */
      73    TEST_VCOMBINE(int, s, 8, 8, 16);
      74    TEST_VCOMBINE(int, s, 16, 4, 8);
      75    TEST_VCOMBINE(int, s, 32, 2, 4);
      76    TEST_VCOMBINE(int, s, 64, 1, 2);
      77    TEST_VCOMBINE(uint, u, 8, 8, 16);
      78    TEST_VCOMBINE(uint, u, 16, 4, 8);
      79    TEST_VCOMBINE(uint, u, 32, 2, 4);
      80    TEST_VCOMBINE(uint, u, 64, 1, 2);
      81    TEST_VCOMBINE(poly, p, 8, 8, 16);
      82    TEST_VCOMBINE(poly, p, 16, 4, 8);
      83  #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
      84    TEST_VCOMBINE(float, f, 16, 4, 8);
      85  #endif
      86    TEST_VCOMBINE(float, f, 32, 2, 4);
      87  
      88    CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
      89    CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
      90    CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
      91    CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
      92    CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
      93    CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
      94    CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
      95    CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
      96    CHECK_POLY(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
      97    CHECK_POLY(TEST_MSG, poly, 16, 8, PRIx16, expected, "");
      98  #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
      99    CHECK_FP(TEST_MSG, float, 16, 8, PRIx16, expected, "");
     100  #endif
     101    CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, "");
     102  }
     103  
     104  int main (void)
     105  {
     106    exec_vcombine ();
     107    return 0;
     108  }