(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
aarch64/
advsimd-intrinsics/
bf16_vect_copy_lane_1.c
       1  /* { dg-do assemble { target { aarch64*-*-* } } } */
       2  /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
       3  /* { dg-additional-options "-march=armv8.2-a+bf16 -O3 --save-temps -std=gnu90" } */
       4  
       5  #include "arm_neon.h"
       6  
       7  bfloat16x4_t __attribute__((noinline,noclone))
       8  test_vcopy_lane_bf16 (bfloat16x4_t a, bfloat16x4_t b)
       9  {
      10    return vcopy_lane_bf16 (a, 1, b, 2);
      11  }
      12  
      13  bfloat16x8_t __attribute__((noinline,noclone))
      14  test_vcopyq_lane_bf16 (bfloat16x8_t a, bfloat16x4_t b)
      15  {
      16    return vcopyq_lane_bf16 (a, 1, b, 2);
      17  }
      18  
      19  bfloat16x4_t __attribute__((noinline,noclone))
      20  test_vcopy_laneq_bf16 (bfloat16x4_t a, bfloat16x8_t b)
      21  {
      22    return vcopy_laneq_bf16 (a, 1, b, 2);
      23  }
      24  
      25  bfloat16x8_t __attribute__((noinline,noclone))
      26  test_vcopyq_laneq_bf16 (bfloat16x8_t a, bfloat16x8_t b)
      27  {
      28    return vcopyq_laneq_bf16 (a, 1, b, 2);
      29  }
      30  
      31  /* { dg-final { scan-assembler-times "ins\\tv0.h\\\[1\\\], v1.h\\\[2\\\]" 2 } } */
      32  /* { dg-final { scan-assembler-times "ins\\tv0.h\\\[1\\\], v1.h\\\[0\\\]" 2 } } */