(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.misc-tests/
arm-isr.c
       1  /* { dg-options "-mgeneral-regs-only" } */
       2  
       3  extern void abort ();
       4  extern void exit (int);
       5  
       6  #ifndef __thumb__
       7  /* There used to be a couple of bugs in the ARM's prologue and epilogue
       8     generation for ISR routines.  The wrong epilogue instruction would be
       9     generated to restore the IP register if it had to be pushed onto the
      10     stack, and the wrong offset was being computed for local variables if
      11     r0 - r3 had to be saved.  This tests for both of these cases.  */
      12  
      13  int z = 9;
      14  
      15  int
      16  bar (void)
      17  {
      18    return z;
      19  }
      20  
      21  int
      22  foo (int a, int b, int c, int d, int e, int f, int g, int h)
      23  {
      24    volatile int i = (a + b) - (g + h) + bar ();
      25    volatile int j = (e + f) - (c + d);
      26  
      27    return a + b + c + d + e + f + g + h + i + j;
      28  }
      29  
      30  int foo1 (int a, int b, int c, int d, int e, int f, int g, int h) __attribute__ ((interrupt ("IRQ")));
      31  
      32  int
      33  foo1 (int a, int b, int c, int d, int e, int f, int g, int h)
      34  {
      35    volatile int i = (a + b) - (g + h) + bar ();
      36    volatile int j = (e + f) - (c + d);
      37  
      38    return a + b + c + d + e + f + g + h + i + j;
      39  }
      40  #endif
      41  
      42  int
      43  main (void)
      44  {
      45  #ifndef __thumb__
      46    if (foo (1, 2, 3, 4, 5, 6, 7, 8) != 32)
      47      abort ();
      48      
      49    if (foo1 (1, 2, 3, 4, 5, 6, 7, 8) != 32)
      50      abort ();
      51  #endif
      52    exit (0);
      53  }