1  /* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
       2  /* { dg-options "-O2 -fschedule-insns -fsel-sched-pipelining -fselective-scheduling -fno-if-conversion -fno-tree-dce" } */
       3  /* { dg-additional-options "-march=bdver1" { target i?86-*-* x86_64-*-* } } */
       4  
       5  int ov, rq, ac;
       6  
       7  int
       8  y2 (int);
       9  
      10  void
      11  f8 (int vn)
      12  {
      13    while (rq < 1)
      14      {
      15        ov *= y2 (ac);
      16        vn += (!!ov && !!ac) + ac;
      17      }
      18  }