1 /* Definitions of target machine for GNU compiler. VAX version.
2 Copyright (C) 1987-2023 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20
21 /* Target CPU builtins. */
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__vax__"); \
26 builtin_assert ("cpu=vax"); \
27 builtin_assert ("machine=vax"); \
28 if (TARGET_G_FLOAT) \
29 { \
30 builtin_define ("__GFLOAT"); \
31 builtin_define ("__GFLOAT__"); \
32 } \
33 } \
34 while (0)
35
36 /* Use -J option for long branch support with Unix assembler. */
37
38 #define ASM_SPEC "-J"
39
40 /* Choose proper libraries depending on float format.
41 Note that there are no profiling libraries for g-format.
42 Also use -lg for the sake of dbx. */
43
44 #define LIB_SPEC "%{g:-lg}\
45 %{mg:%{lm:-lmg} -lcg \
46 %{p:%eprofiling not supported with -mg\n}\
47 %{pg:%eprofiling not supported with -mg\n}}\
48 %{!mg:%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}"
49
50 /* Run-time compilation parameters selecting different hardware subsets. */
51
52 /* Nonzero if ELF. Redefined by vax/elf.h. */
53 #define TARGET_ELF 0
54
55 /* Use BSD names for udiv and umod libgcc calls. */
56 #define TARGET_BSD_DIVMOD 1
57
58 /* Default target_flags if no switches specified. */
59
60 #ifndef TARGET_DEFAULT
61 #define TARGET_DEFAULT (MASK_UNIX_ASM)
62 #endif
63
64
65 /* Target machine storage layout */
66
67 /* Define this if most significant bit is lowest numbered
68 in instructions that operate on numbered bit-fields.
69 This is not true on the VAX. */
70 #define BITS_BIG_ENDIAN 0
71
72 /* Define this if most significant byte of a word is the lowest numbered. */
73 /* That is not true on the VAX. */
74 #define BYTES_BIG_ENDIAN 0
75
76 /* Define this if most significant word of a multiword number is the lowest
77 numbered. */
78 /* This is not true on the VAX. */
79 #define WORDS_BIG_ENDIAN 0
80
81 /* Width of a word, in units (bytes). */
82 #define UNITS_PER_WORD 4
83
84 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
85 #define PARM_BOUNDARY 32
86
87 /* Allocation boundary (in *bits*) for the code of a function. */
88 #define FUNCTION_BOUNDARY 16
89
90 /* Alignment of field after `int : 0' in a structure. */
91 #define EMPTY_FIELD_BOUNDARY (TARGET_VAXC_ALIGNMENT ? 8 : 32)
92
93 /* Every structure's size must be a multiple of this. */
94 #define STRUCTURE_SIZE_BOUNDARY 8
95
96 /* A bit-field declared as `int' forces `int' alignment for the struct. */
97 #define PCC_BITFIELD_TYPE_MATTERS (! TARGET_VAXC_ALIGNMENT)
98
99 /* No data type wants to be aligned rounder than this. */
100 #define BIGGEST_ALIGNMENT 32
101
102 /* No structure field wants to be aligned rounder than this. */
103 #define BIGGEST_FIELD_ALIGNMENT (TARGET_VAXC_ALIGNMENT ? 8 : 32)
104
105 /* Set this nonzero if move instructions will actually fail to work
106 when given unaligned data. */
107 #define STRICT_ALIGNMENT 0
108
109 /* Let's keep the stack somewhat aligned. */
110 #define STACK_BOUNDARY 32
111
112 /* The table of an ADDR_DIFF_VEC must be contiguous with the case
113 opcode, it is part of the case instruction. */
114 #define ADDR_VEC_ALIGN(ADDR_VEC) 0
115
116 /* Standard register usage. */
117
118 /* Number of actual hardware registers.
119 The hardware registers are assigned numbers for the compiler
120 from 0 to just below FIRST_PSEUDO_REGISTER.
121 All registers that the compiler knows about must be given numbers,
122 even those that are not normally considered general registers. */
123 #define FIRST_PSEUDO_REGISTER 17
124
125 /* 1 for registers that have pervasive standard uses
126 and are not available for the register allocator.
127 On the VAX, these are the AP, FP, SP and PC. */
128 #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1}
129
130 /* 1 for registers not available across function calls.
131 These must include the FIXED_REGISTERS and also any
132 registers that can be used without being saved.
133 The latter must include the registers where values are returned
134 and the register where structure-value addresses are passed.
135 Aside from that, you can include as many other registers as you like. */
136 #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1}
137
138 /* Specify the registers used for certain standard purposes.
139 The values of these macros are register numbers. */
140
141 /* VAX pc is overloaded on a register. */
142 #define PC_REGNUM VAX_PC_REGNUM
143
144 /* Register to use for pushing function arguments. */
145 #define STACK_POINTER_REGNUM VAX_SP_REGNUM
146
147 /* Base register for access to local variables of the function. */
148 #define FRAME_POINTER_REGNUM VAX_FP_REGNUM
149
150 /* Offset from the frame pointer register value to the top of stack. */
151 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
152
153 /* Base register for access to arguments of the function. */
154 #define ARG_POINTER_REGNUM VAX_AP_REGNUM
155
156 /* Register in which static-chain is passed to a function. */
157 #define STATIC_CHAIN_REGNUM 0
158
159 /* Register in which address to store a structure value
160 is passed to a function. */
161 #define VAX_STRUCT_VALUE_REGNUM 1
162
163 /* Define the classes of registers for register constraints in the
164 machine description. Also define ranges of constants.
165
166 One of the classes must always be named ALL_REGS and include all hard regs.
167 If there is more than one class, another class must be named NO_REGS
168 and contain no registers.
169
170 The name GENERAL_REGS must be the name of a class (or an alias for
171 another name such as ALL_REGS). This is the class of registers
172 that is allowed by "g" or "r" in a register constraint.
173 Also, registers outside this class are allocated only when
174 instructions express preferences for them.
175
176 The classes must be numbered in nondecreasing order; that is,
177 a larger-numbered class must never be contained completely
178 in a smaller-numbered class.
179
180 For any two classes, it is very desirable that there be another
181 class that represents their union. */
182
183 /* The VAX has only one kind of registers, so NO_REGS and ALL_REGS
184 are the only classes. */
185
186 enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
187
188 #define N_REG_CLASSES (int) LIM_REG_CLASSES
189
190 /* Since GENERAL_REGS is the same class as ALL_REGS,
191 don't give it a different class number; just make it an alias. */
192
193 #define GENERAL_REGS ALL_REGS
194
195 /* Give names of register classes as strings for dump file. */
196
197 #define REG_CLASS_NAMES \
198 { "NO_REGS", "ALL_REGS" }
199
200 /* Define which registers fit in which classes.
201 This is an initializer for a vector of HARD_REG_SET
202 of length N_REG_CLASSES. */
203
204 #define REG_CLASS_CONTENTS {{0}, {0xffff}}
205
206 /* The same information, inverted:
207 Return the class number of the smallest class containing
208 reg number REGNO. This could be a conditional expression
209 or could index an array. */
210
211 #define REGNO_REG_CLASS(REGNO) ((void)(REGNO), ALL_REGS)
212
213 /* The class value for index registers, and the one for base regs. */
214
215 #define INDEX_REG_CLASS ALL_REGS
216 #define BASE_REG_CLASS ALL_REGS
217
218
219 /* Stack layout; function entry, exit and calling. */
220
221 /* Define this if pushing a word on the stack
222 makes the stack pointer a smaller address. */
223 #define STACK_GROWS_DOWNWARD 1
224
225 /* Define this to nonzero if the nominal address of the stack frame
226 is at the high-address end of the local variables;
227 that is, each additional local variable allocated
228 goes at a more negative offset in the frame. */
229 #define FRAME_GROWS_DOWNWARD 1
230
231 /* Given an rtx for the address of a frame,
232 return an rtx for the address of the word in the frame
233 that holds the dynamic chain--the previous frame's address. */
234 #define DYNAMIC_CHAIN_ADDRESS(FRAME) plus_constant (Pmode, (FRAME), 12)
235
236 /* If we generate an insn to push BYTES bytes,
237 this says how many the stack pointer really advances by.
238 On the VAX, -(sp) pushes only the bytes of the operands. */
239 #define PUSH_ROUNDING(BYTES) (BYTES)
240
241 /* Offset of first parameter from the argument pointer register value. */
242 #define FIRST_PARM_OFFSET(FNDECL) 4
243
244 /* Define how to find the value returned by a function.
245 VALTYPE is the data type of the value (as a tree).
246 If the precise function being called is known, FUNC is its FUNCTION_DECL;
247 otherwise, FUNC is 0. */
248
249 /* On the VAX the return value is in R0 regardless. */
250
251 #define FUNCTION_VALUE(VALTYPE, FUNC) \
252 gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
253
254 /* Define how to find the value returned by a library function
255 assuming the value has mode MODE. */
256
257 /* On the VAX the return value is in R0 regardless. */
258
259 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
260
261 /* Define this if PCC uses the nonreentrant convention for returning
262 structure and union values. */
263
264 #define PCC_STATIC_STRUCT_RETURN
265
266 /* 1 if N is a possible register number for a function value.
267 On the VAX, R0 is the only register thus used. */
268
269 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
270
271 /* 1 if N is a possible register number for function argument passing.
272 On the VAX, no registers are used in this way. */
273
274 #define FUNCTION_ARG_REGNO_P(N) ((void) (N), 0)
275
276 /* Define a data type for recording info about an argument list
277 during the scan of that argument list. This data type should
278 hold all necessary information about the function itself
279 and about the args processed so far, enough to enable macros
280 such as FUNCTION_ARG to determine where the next arg should go.
281
282 On the VAX, this is a single integer, which is a number of bytes
283 of arguments scanned so far. */
284
285 #define CUMULATIVE_ARGS int
286
287 /* Initialize a variable CUM of type CUMULATIVE_ARGS
288 for a call to a function whose data type is FNTYPE.
289 For a library call, FNTYPE is 0.
290
291 On the VAX, the offset starts at 0. */
292
293 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
294 ((CUM) = 0)
295
296 /* Output assembler code to FILE to increment profiler label # LABELNO
297 for profiling a function entry. */
298
299 #define VAX_FUNCTION_PROFILER_NAME "mcount"
300 #define FUNCTION_PROFILER(FILE, LABELNO) \
301 do \
302 { \
303 char label[256]; \
304 ASM_GENERATE_INTERNAL_LABEL (label, "LP", (LABELNO)); \
305 fprintf (FILE, "\tmovab "); \
306 assemble_name (FILE, label); \
307 asm_fprintf (FILE, ",%Rr0\n\tjsb %s\n", \
308 VAX_FUNCTION_PROFILER_NAME); \
309 } \
310 while (0)
311
312 /* This macro specifies a table of register pairs used to eliminate
313 unneeded registers that point into the stack frame. */
314 #define ELIMINABLE_REGS {{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
315
316 /* On the VAX, FRAME_POINTER_REQUIRED is always 1, so the definition of this
317 macro doesn't matter for register eliminations, but it should still
318 give realistic data for rtx_addr_can_trap_p. */
319 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
320 ((OFFSET) = get_frame_size ())
321
322 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
323 the stack pointer does not matter. The value is tested only in
324 functions that have frame pointers.
325 No definition is equivalent to always zero. */
326
327 #define EXIT_IGNORE_STACK 1
328
329 /* Length in units of the trampoline for entering a nested function. */
330
331 #define TRAMPOLINE_SIZE 15
332
333 /* Byte offset of return address in a stack frame. The "saved PC" field
334 is in element [4] when treating the frame as an array of longwords. */
335
336 #define RETURN_ADDRESS_OFFSET (4 * UNITS_PER_WORD) /* 16 */
337
338 /* A C expression whose value is RTL representing the value of the return
339 address for the frame COUNT steps up from the current frame.
340 FRAMEADDR is already the frame pointer of the COUNT frame, so we
341 can ignore COUNT. */
342
343 #define RETURN_ADDR_RTX(COUNT, FRAME) \
344 ((COUNT == 0) \
345 ? gen_rtx_MEM (Pmode, plus_constant (Pmode, FRAME, \
346 RETURN_ADDRESS_OFFSET)) \
347 : (rtx) 0)
348
349
350 /* Addressing modes, and classification of registers for them. */
351
352 #define HAVE_POST_INCREMENT 1
353
354 #define HAVE_PRE_DECREMENT 1
355
356 /* Macros to check register numbers against specific register classes. */
357
358 /* These assume that REGNO is a hard or pseudo reg number.
359 They give nonzero only if REGNO is a hard reg of the suitable class
360 or a pseudo reg currently allocated to a suitable hard reg.
361 Since they use reg_renumber, they are safe only once reg_renumber
362 has been allocated, which happens in reginfo.cc during register
363 allocation. */
364
365 #define REGNO_OK_FOR_INDEX_P(regno) \
366 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
367 #define REGNO_OK_FOR_BASE_P(regno) \
368 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
369
370 /* Maximum number of registers that can appear in a valid memory address. */
371
372 #define MAX_REGS_PER_ADDRESS 2
373
374 /* 1 if X is an rtx for a constant that is a valid address. */
375
376 #define CONSTANT_ADDRESS_P(X) legitimate_constant_address_p (X)
377
378 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
379 and check its validity for a certain class.
380 We have two alternate definitions for each of them.
381 The usual definition accepts all pseudo regs; the other rejects
382 them unless they have been allocated suitable hard regs.
383 The symbol REG_OK_STRICT causes the latter definition to be used.
384
385 Most source files want to accept pseudo regs in the hope that
386 they will get allocated to the class that the insn wants them to be in.
387 Source files for reload pass need to be strict.
388 After reload, it makes no difference, since pseudo regs have
389 been eliminated by then. */
390
391 #ifndef REG_OK_STRICT
392
393 /* Nonzero if X is a hard reg that can be used as an index
394 or if it is a pseudo reg. */
395 #define REG_OK_FOR_INDEX_P(X) 1
396
397 /* Nonzero if X is a hard reg that can be used as a base reg
398 or if it is a pseudo reg. */
399 #define REG_OK_FOR_BASE_P(X) 1
400
401 #else
402
403 /* Nonzero if X is a hard reg that can be used as an index. */
404 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
405
406 /* Nonzero if X is a hard reg that can be used as a base reg. */
407 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
408
409 #endif
410
411 /* Specify the machine mode that this machine uses
412 for the index in the tablejump instruction. */
413 #define CASE_VECTOR_MODE HImode
414
415 /* Define as C expression which evaluates to nonzero if the tablejump
416 instruction expects the table to contain offsets from the address of the
417 table.
418 Do not define this if the table should contain absolute addresses. */
419 #define CASE_VECTOR_PC_RELATIVE 1
420
421 /* Indicate that jump tables go in the text section. This is
422 necessary when compiling PIC code. */
423 #define JUMP_TABLES_IN_TEXT_SECTION 1
424
425 /* Define this as 1 if `char' should by default be signed; else as 0. */
426 #define DEFAULT_SIGNED_CHAR 1
427
428 /* Max number of bytes we can move from memory to memory
429 in one reasonably fast instruction. */
430 #define MOVE_MAX 8
431
432 /* If a memory-to-memory move would take MOVE_RATIO or more simple
433 move-instruction pairs, we will do a cpymem or libcall instead. */
434 #define MOVE_RATIO(speed) ((speed) ? 6 : 3)
435 #define CLEAR_RATIO(speed) ((speed) ? 6 : 2)
436 #define SET_RATIO(speed) ((speed) ? 6 : 2)
437
438 /* Nonzero if access to memory by bytes is slow and undesirable. */
439 #define SLOW_BYTE_ACCESS 0
440
441 /* Define if shifts truncate the shift count
442 which implies one can omit a sign-extension or zero-extension
443 of a shift count. */
444 /* #define SHIFT_COUNT_TRUNCATED */
445
446 /* We need to reject symbol references in PIC code except for address
447 loads, handled elsewhere. */
448 #define LEGITIMATE_PIC_OPERAND_P(x) \
449 vax_acceptable_pic_operand_p ((x), false, false)
450
451 /* Specify the machine mode that pointers have.
452 After generation of rtl, the compiler makes no further distinction
453 between pointers and any other objects of this machine mode. */
454 #define Pmode SImode
455
456 /* A function address in a call instruction
457 is a byte address (for indexing purposes)
458 so give the MEM rtx a byte's mode. */
459 #define FUNCTION_MODE QImode
460
461 /* Specify the cost of a branch insn; roughly the number of extra insns that
462 should be added to avoid a branch.
463
464 Branches are extremely cheap on the VAX while the shift insns often
465 used to replace branches can be expensive. */
466
467 #define BRANCH_COST(speed_p, predictable_p) 0
468
469 /* Given a comparison code (NE, EQ, etc.) and the operands of a COMPARE,
470 return the mode to be used for the comparison. As we have the same
471 interpretation of condition codes across all the instructions we just
472 return the narrowest mode suitable for the comparison code requested. */
473 #define SELECT_CC_MODE(OP, X, Y) vax_select_cc_mode (OP, X, Y)
474
475 /* Control the assembler format that we output. */
476
477 /* A C string constant describing how to begin a comment in the target
478 assembler language. The compiler assumes that the comment will end at
479 the end of the line. */
480
481 #define ASM_COMMENT_START "#"
482
483 /* Output to assembler file text saying following lines
484 may contain character constants, extra white space, comments, etc. */
485
486 #define ASM_APP_ON "#APP\n"
487
488 /* Output to assembler file text saying following lines
489 no longer contain unusual constructs. */
490
491 #define ASM_APP_OFF "#NO_APP\n"
492
493 /* Output before read-only data. */
494
495 #define TEXT_SECTION_ASM_OP "\t.text"
496
497 /* Output before writable data. */
498
499 #define DATA_SECTION_ASM_OP "\t.data"
500
501 /* How to refer to registers in assembler output.
502 This sequence is indexed by compiler's hard-register-number (see above).
503 The register names will be prefixed by REGISTER_PREFIX, if any. */
504
505 #define REGISTER_PREFIX ""
506 #define REGISTER_NAMES \
507 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
508 "r8", "r9", "r10", "r11", "ap", "fp", "sp", "pc", \
509 "psl" }
510
511 /* VAX specific: which type character is used for type double? */
512
513 #define ASM_DOUBLE_CHAR (TARGET_G_FLOAT ? 'g' : 'd')
514
515 /* This is how to output a command to make the user-level label named NAME
516 defined for reference from other files. */
517
518 /* Globalizing directive for a label. */
519 #define GLOBAL_ASM_OP ".globl "
520
521 /* The prefix to add to user-visible assembler symbols. */
522
523 #define USER_LABEL_PREFIX "_"
524
525 /* This is how to store into the string LABEL
526 the symbol_ref name of an internal numbered label where
527 PREFIX is the class of label and NUM is the number within the class.
528 This is suitable for output with `assemble_name'. */
529
530 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
531 sprintf (LABEL, "*%s%ld", PREFIX, (long)(NUM))
532
533 /* This is how to output an insn to push a register on the stack.
534 It need not be very fast code. */
535
536 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
537 fprintf (FILE, "\tpushl %s\n", reg_names[REGNO])
538
539 /* This is how to output an insn to pop a register from the stack.
540 It need not be very fast code. */
541
542 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
543 fprintf (FILE, "\tmovl (%s)+,%s\n", reg_names[STACK_POINTER_REGNUM], \
544 reg_names[REGNO])
545
546 /* This is how to output an element of a case-vector that is absolute.
547 (The VAX does not use such vectors,
548 but we must define this macro anyway.) */
549
550 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
551 do \
552 { \
553 char label[256]; \
554 ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE));\
555 fprintf (FILE, "\t.long "); \
556 assemble_name (FILE, label); \
557 fprintf (FILE, "\n"); \
558 } \
559 while (0)
560
561 /* This is how to output an element of a case-vector that is relative. */
562
563 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
564 do \
565 { \
566 char label[256]; \
567 ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \
568 fprintf (FILE, "\t.word "); \
569 assemble_name (FILE, label); \
570 ASM_GENERATE_INTERNAL_LABEL (label, "L", (REL)); \
571 fprintf (FILE, "-"); \
572 assemble_name (FILE, label); \
573 fprintf (FILE, "\n"); \
574 } \
575 while (0)
576
577 /* This is how to output an assembler line
578 that says to advance the location counter
579 to a multiple of 2**LOG bytes. */
580
581 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
582 fprintf (FILE, "\t.align %d\n", (LOG))
583
584 /* This is how to output an assembler line
585 that says to advance the location counter by SIZE bytes. */
586
587 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
588 fprintf (FILE, "\t.space %u\n", (int)(SIZE))
589
590 /* This says how to output an assembler line
591 to define a global common symbol. */
592
593 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
594 ( fputs (".comm ", (FILE)), \
595 assemble_name ((FILE), (NAME)), \
596 fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
597
598 /* This says how to output an assembler line
599 to define a local common symbol. */
600
601 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
602 ( fputs (".lcomm ", (FILE)), \
603 assemble_name ((FILE), (NAME)), \
604 fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
605
606 /* Print an instruction operand X on file FILE.
607 CODE is the code from the %-spec that requested printing this operand;
608 if `%z3' was used to print operand 3, then CODE is 'z'.
609
610 VAX operand formatting codes:
611
612 letter print
613 c direct branch condition
614 C reverse branch condition
615 D 64-bit immediate operand
616 B the low 8 bits of the complement of a constant operand
617 H the low 16 bits of the complement of a constant operand
618 M a mask for the N highest bits of a word
619 N the complement of a constant integer operand
620 P constant operand plus 1
621 R 32 - constant operand
622 b the low 8 bits of a negated constant operand
623 h the low 16 bits of a negated constant operand
624 # 'd' or 'g' depending on whether dfloat or gfloat is used
625 | register prefix */
626
627 /* The purpose of D is to get around a quirk or bug in VAX assembler
628 whereby -1 in a 64-bit immediate operand means 0x00000000ffffffff,
629 which is not a 64-bit minus one. As a workaround, we output negative
630 values in hex. */
631 #if HOST_BITS_PER_WIDE_INT == 64
632 # define NEG_HWI_PRINT_HEX16 HOST_WIDE_INT_PRINT_HEX
633 #else
634 # define NEG_HWI_PRINT_HEX16 "0xffffffff%08lx"
635 #endif
636
637 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
638 ((CODE) == '#' || (CODE) == '|')
639
640 #define PRINT_OPERAND(FILE, X, CODE) \
641 print_operand (FILE, X, CODE)
642
643 /* Print a memory operand whose address is X, on file FILE.
644 This uses a function in output-vax.c. */
645
646 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
647 print_operand_address (FILE, ADDR)
648
649 /* This is a blatent lie. However, it's good enough, since we don't
650 actually have any code whatsoever for which this isn't overridden
651 by the proper FDE definition. */
652 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, PC_REGNUM)
653
654 /* Upon failure to find the bit the FFS hardware instruction returns
655 the position of the bit immediately following the field specified. */
656 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
657 ((VALUE) = GET_MODE_BITSIZE (MODE), 2)